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Message-ID: <a19d0dbafa96704e0696820b3e51179dd45088bd.camel@intel.com>
Date: Thu, 22 Jun 2023 08:22:12 +0000
From: "Huang, Kai" <kai.huang@...el.com>
To: "pbonzini@...hat.com" <pbonzini@...hat.com>,
"Christopherson,, Sean" <seanjc@...gle.com>,
"mizhang@...gle.com" <mizhang@...gle.com>
CC: "jmattson@...gle.com" <jmattson@...gle.com>,
"kvm@...r.kernel.org" <kvm@...r.kernel.org>,
"linux-doc@...r.kernel.org" <linux-doc@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"dmatlack@...gle.com" <dmatlack@...gle.com>,
"bgardon@...gle.com" <bgardon@...gle.com>
Subject: Re: [PATCH 1/6] KVM: Documentation: Add the missing guest_mode in
kvm_mmu_page_role
On Sun, 2023-06-18 at 00:08 +0000, Mingwei Zhang wrote:
> Add the missing guest_mode in kvm_mmu_page_role description. guest_mode
> tells KVM whether a shadow page is used for the L1 or an L2. Update the
> missing field in documentation.
>
> Signed-off-by: Mingwei Zhang <mizhang@...gle.com>
> ---
> Documentation/virt/kvm/x86/mmu.rst | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/Documentation/virt/kvm/x86/mmu.rst b/Documentation/virt/kvm/x86/mmu.rst
> index 8364afa228ec..561efa8ec7d7 100644
> --- a/Documentation/virt/kvm/x86/mmu.rst
> +++ b/Documentation/virt/kvm/x86/mmu.rst
> @@ -202,6 +202,8 @@ Shadow pages contain the following information:
> Is 1 if the MMU instance cannot use A/D bits. EPT did not have A/D
> bits before Haswell; shadow EPT page tables also cannot use A/D bits
> if the L1 hypervisor does not enable them.
> + role.guest_mode:
> + Indicates the shadow page is created for a nested guest.
> role.passthrough:
> The page is not backed by a guest page table, but its first entry
> points to one. This is set if NPT uses 5-level page tables (host
Reviewed-by: Kai Huang <kai.huang@...el.com>
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