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Message-ID: <20230622083235.wmztbyl7nngfpufm@blmsp>
Date:   Thu, 22 Jun 2023 10:32:35 +0200
From:   Markus Schneider-Pargmann <msp@...libre.com>
To:     AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>
Cc:     Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Matthias Brugger <matthias.bgg@...il.com>,
        Chun-Jie Chen <chun-jie.chen@...iatek.com>,
        Tinghan Shen <tinghan.shen@...iatek.com>,
        Fabien Parent <parent.f@...il.com>, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org
Subject: Re: [PATCH v5 5/8] soc: mediatek: pm-domains: Unify configuration
 for infracfg and smi

On Mon, Jun 19, 2023 at 11:22:18AM +0200, AngeloGioacchino Del Regno wrote:
> Il 19/06/23 10:53, Markus Schneider-Pargmann ha scritto:
> > Use flags to distinguish between infracfg and smi subsystem for a bus
> > protection configuration. It simplifies enabling/disabling and prepares
> > the driver for the use of another regmap for mt8365.
> > 
> > Signed-off-by: Markus Schneider-Pargmann <msp@...libre.com>
> > ---
> >   drivers/soc/mediatek/mt6795-pm-domains.h |  16 +-
> >   drivers/soc/mediatek/mt8167-pm-domains.h |  20 +-
> >   drivers/soc/mediatek/mt8173-pm-domains.h |  16 +-
> >   drivers/soc/mediatek/mt8183-pm-domains.h | 198 ++++-----
> >   drivers/soc/mediatek/mt8186-pm-domains.h | 212 +++++-----
> >   drivers/soc/mediatek/mt8188-pm-domains.h | 518 +++++++++++------------
> >   drivers/soc/mediatek/mt8192-pm-domains.h | 262 ++++++------
> >   drivers/soc/mediatek/mt8195-pm-domains.h | 464 ++++++++++----------
> >   drivers/soc/mediatek/mtk-pm-domains.c    |  64 ++-
> >   drivers/soc/mediatek/mtk-pm-domains.h    |  37 +-
> >   10 files changed, 908 insertions(+), 899 deletions(-)
> > 
> 
> ..snip..
> 
> > diff --git a/drivers/soc/mediatek/mtk-pm-domains.h b/drivers/soc/mediatek/mtk-pm-domains.h
> > index 4b6ae56e7c95..356788263db2 100644
> > --- a/drivers/soc/mediatek/mtk-pm-domains.h
> > +++ b/drivers/soc/mediatek/mtk-pm-domains.h
> > @@ -45,6 +45,8 @@
> >   enum scpsys_bus_prot_flags {
> >   	BUS_PROT_REG_UPDATE = BIT(1),
> >   	BUS_PROT_IGNORE_CLR_ACK = BIT(2),
> > +	BUS_PROT_COMPONENT_INFRA = BIT(3),
> > +	BUS_PROT_COMPONENT_SMI = BIT(4),
> >   };
> >   #define _BUS_PROT(_set_clr_mask, _set, _clr, _sta_mask, _sta, _flags) {	\
> > @@ -56,17 +58,30 @@ enum scpsys_bus_prot_flags {
> >   		.flags = _flags					\
> >   	}
> > -#define BUS_PROT_WR(_mask, _set, _clr, _sta)			\
> > -		_BUS_PROT(_mask, _set, _clr, _mask, _sta, 0)
> > +#define BUS_PROT_INFRA_WR(_mask, _set, _clr, _sta) \
> > +		_BUS_PROT(_mask, _set, _clr, _mask, _sta, BUS_PROT_COMPONENT_INFRA)
> 
> What about doing that like
> 
> #define BUS_PROT_WR(_hwip, _mask, _set, _clr, _sta)
> 	_BUS_PROT(_mask, _set, _clr, _mask, _sta, BUS_PROT_COMPONENT_##_hwip)
> 
> ...so that instead of defining BUS_PROT_INFRA_WR, BUS_PROT_SMI_WR and
> BUS_PROT_ANOTHERIP_WR, we keep just one macro?
> 
> That'd be then like:
> 
> 	.bp_cfg = {
> 		BUS_PROT_WR(INFRA, MT8183_TOP_AXI_PROT_EN_1_DISP,
> 			    MT8183_TOP_AXI_PROT_EN_....
> 			    ....),
> 		BUS_PROT_WR(SMI, MT8183_SMI_COMMON_SMI_CLAMP_DISP,
> 			    .....),
> 	}
> 
> IMO, that's cleaner, less lines of code and more flexible for eventual
> future new variations of that.

Yes it would be much cleaner, though it is a bit more intransparent how
these macros are resolved. Anyways I think it being cleaner outweighs
that. I will change it for the next version.

Thanks,
Markus

> 
> Cheers,
> Angelo
> 
> > -#define BUS_PROT_WR_IGN(_mask, _set, _clr, _sta)		\
> > -		_BUS_PROT(_mask, _set, _clr, _mask, _sta, BUS_PROT_IGNORE_CLR_ACK)
> > +#define BUS_PROT_INFRA_WR_IGN(_mask, _set, _clr, _sta) \
> > +		_BUS_PROT(_mask, _set, _clr, _mask, _sta, \
> > +			  BUS_PROT_COMPONENT_INFRA | BUS_PROT_IGNORE_CLR_ACK)
> > -#define BUS_PROT_UPDATE(_mask, _set, _clr, _sta)		\
> > -		_BUS_PROT(_mask, _set, _clr, _mask, _sta, BUS_PROT_REG_UPDATE)
> > +#define BUS_PROT_INFRA_UPDATE(_mask, _set, _clr, _sta) \
> > +		_BUS_PROT(_mask, _set, _clr, _mask, _sta, \
> > +			  BUS_PROT_COMPONENT_INFRA | BUS_PROT_REG_UPDATE)
> > -#define BUS_PROT_UPDATE_TOPAXI(_mask)				\
> > -		BUS_PROT_UPDATE(_mask,				\
> > +#define BUS_PROT_SMI_WR(_mask, _set, _clr, _sta) \
> > +		_BUS_PROT(_mask, _set, _clr, _mask, _sta, BUS_PROT_COMPONENT_SMI)
> > +
> > +#define BUS_PROT_SMI_WR_IGN(_mask, _set, _clr, _sta) \
> > +		_BUS_PROT(_mask, _set, _clr, _mask, _sta, \
> > +			  BUS_PROT_COMPONENT_SMI | BUS_PROT_IGNORE_CLR_ACK)
> > +
> > +#define BUS_PROT_SMI_UPDATE(_mask, _set, _clr, _sta) \
> > +		_BUS_PROT(_mask, _set, _clr, _mask, _sta, \
> > +			  BUS_PROT_COMPONENT_SMI | BUS_PROT_REG_UPDATE)
> > +
> > +#define BUS_PROT_INFRA_UPDATE_TOPAXI(_mask)				\
> > +		BUS_PROT_INFRA_UPDATE(_mask,				\
> >   				INFRA_TOPAXI_PROTECTEN,		\
> >   				INFRA_TOPAXI_PROTECTEN,		\
> >   				INFRA_TOPAXI_PROTECTSTA1)
> > @@ -90,8 +105,7 @@ struct scpsys_bus_prot_data {
> >    * @ext_buck_iso_offs: The offset for external buck isolation
> >    * @ext_buck_iso_mask: The mask for external buck isolation
> >    * @caps: The flag for active wake-up action.
> > - * @bp_infracfg: bus protection for infracfg subsystem
> > - * @bp_smi: bus protection for smi subsystem
> > + * @bp_cfg: bus protection configuration for any subsystem
> >    */
> >   struct scpsys_domain_data {
> >   	const char *name;
> > @@ -102,8 +116,7 @@ struct scpsys_domain_data {
> >   	int ext_buck_iso_offs;
> >   	u32 ext_buck_iso_mask;
> >   	u8 caps;
> > -	const struct scpsys_bus_prot_data bp_infracfg[SPM_MAX_BUS_PROT_DATA];
> > -	const struct scpsys_bus_prot_data bp_smi[SPM_MAX_BUS_PROT_DATA];
> > +	const struct scpsys_bus_prot_data bp_cfg[SPM_MAX_BUS_PROT_DATA];
> >   	int pwr_sta_offs;
> >   	int pwr_sta2nd_offs;
> >   };
> 

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