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Date:   Thu, 22 Jun 2023 11:11:12 +0100
From:   John Garry <john.g.garry@...cle.com>
To:     Ilkka Koskinen <ilkka@...amperecomputing.com>,
        Dave Kleikamp <dave.kleikamp@...cle.com>
Cc:     Will Deacon <will@...nel.org>, James Clark <james.clark@....com>,
        Mike Leach <mike.leach@...aro.org>,
        Leo Yan <leo.yan@...aro.org>,
        Peter Zijlstra <peterz@...radead.org>,
        Ingo Molnar <mingo@...hat.com>,
        Arnaldo Carvalho de Melo <acme@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
        Jiri Olsa <jolsa@...nel.org>,
        Namhyung Kim <namhyung@...nel.org>,
        Ian Rogers <irogers@...gle.com>,
        Adrian Hunter <adrian.hunter@...el.com>,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-perf-users@...r.kernel.org
Subject: Re: [PATCH] perf vendor events arm64: Add AmpereOne core pmu events

On 22/06/2023 04:27, Ilkka Koskinen wrote:
>>>
>>> +        "ArchStdEvent": "L1D_CACHE_LMISS_RD"
>>> +    },
>>> +    {
>>> +        "ArchStdEvent": "L1D_CACHE_LMISS"
>>
>> L1D_CACHE_LMISS is not defined anywhere.
> 
> 
> Good catch! I must have thought the python script would at least print a 
> warning of missing event as I compared the build logs with and without 
> the patch. I can prepare a fix for this and submit with another couple 
> of patches. I'm hoping to be able to do that by the beginning of next week.

Hi Ilkka,

Previously the generation of pmu-events.c would fail for a failed event 
fixup, like what we have here. So were you going to re-introduce this 
feature to fail the generation of pmu-events.c for this? It was not 
clear to me which patches you were going to prepare.

Thanks,
John

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