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Message-ID: <ZJfyOukVsxJtP3mi@yilunxu-OptiPlex-7050>
Date: Sun, 25 Jun 2023 15:52:26 +0800
From: Xu Yilun <yilun.xu@...el.com>
To: Marco Pagani <marpagan@...hat.com>
Cc: Moritz Fischer <mdf@...nel.org>, Wu Hao <hao.wu@...el.com>,
Tom Rix <trix@...hat.com>, linux-kernel@...r.kernel.org,
linux-fpga@...r.kernel.org
Subject: Re: [PATCH v7 3/4] fpga: add an initial KUnit suite for the FPGA
Region
On 2023-06-16 at 17:44:04 +0200, Marco Pagani wrote:
> The suite tests the basic behaviors of the FPGA Region including
> the programming and the function for finding a specific Region.
>
> Signed-off-by: Marco Pagani <marpagan@...hat.com>
> ---
> drivers/fpga/tests/fpga-region-test.c | 211 ++++++++++++++++++++++++++
> 1 file changed, 211 insertions(+)
> create mode 100644 drivers/fpga/tests/fpga-region-test.c
>
> diff --git a/drivers/fpga/tests/fpga-region-test.c b/drivers/fpga/tests/fpga-region-test.c
> new file mode 100644
> index 000000000000..a502f3f2560d
> --- /dev/null
> +++ b/drivers/fpga/tests/fpga-region-test.c
> @@ -0,0 +1,211 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * KUnit test for the FPGA Region
> + *
> + * Copyright (C) 2023 Red Hat, Inc.
> + *
> + * Author: Marco Pagani <marpagan@...hat.com>
> + */
> +
> +#include <linux/types.h>
> +#include <linux/module.h>
> +#include <kunit/test.h>
> +#include <linux/platform_device.h>
> +#include <linux/fpga/fpga-mgr.h>
> +#include <linux/fpga/fpga-bridge.h>
> +#include <linux/fpga/fpga-region.h>
Ditto
> +
> +struct mgr_stats {
> + u32 write_count;
> +};
> +
> +struct bridge_stats {
> + bool enable;
> + u32 cycles_count;
> +};
> +
> +struct test_ctx {
> + struct fpga_manager *mgr;
> + struct platform_device *mgr_pdev;
> + struct fpga_bridge *bridge;
> + struct platform_device *bridge_pdev;
> + struct fpga_region *region;
> + struct platform_device *region_pdev;
> + struct bridge_stats bridge_stats;
> + struct mgr_stats mgr_stats;
> +};
> +
> +static int op_write(struct fpga_manager *mgr, const char *buf, size_t count)
> +{
> + struct mgr_stats *stats = mgr->priv;
> +
> + stats->write_count++;
> +
> + return 0;
> +}
> +
> +/*
> + * Fake Manager that implements only the write op to count the number of
> + * programming cycles. The internals of the programming sequence are
> + * tested in the Manager suite since they are outside the responsibility
> + * of the Region.
> + */
> +static const struct fpga_manager_ops fake_mgr_ops = {
> + .write = op_write,
> +};
> +
> +static int op_enable_set(struct fpga_bridge *bridge, bool enable)
> +{
> + struct bridge_stats *stats = bridge->priv;
> +
> + if (!stats->enable && enable)
> + stats->cycles_count++;
> +
> + stats->enable = enable;
> +
> + return 0;
> +}
> +
> +/*
> + * Fake Bridge that implements only enable_set op to count the number of
> + * activation cycles.
> + */
> +static const struct fpga_bridge_ops fake_bridge_ops = {
> + .enable_set = op_enable_set
^
I prefer to add the comma
Others LGTM.
Acked-by: Xu Yilun <yilun.xu@...el.com>
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