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Message-ID: <DU2PR04MB8630F07E727B055388B503B09526A@DU2PR04MB8630.eurprd04.prod.outlook.com>
Date: Mon, 26 Jun 2023 04:46:51 +0000
From: Pankaj Gupta <pankaj.gupta@....com>
To: "Peng Fan (OSS)" <peng.fan@....nxp.com>,
"robh+dt@...nel.org" <robh+dt@...nel.org>,
"krzysztof.kozlowski+dt@...aro.org"
<krzysztof.kozlowski+dt@...aro.org>,
"conor+dt@...nel.org" <conor+dt@...nel.org>,
"shawnguo@...nel.org" <shawnguo@...nel.org>,
"s.hauer@...gutronix.de" <s.hauer@...gutronix.de>,
"kernel@...gutronix.de" <kernel@...gutronix.de>,
"festevam@...il.com" <festevam@...il.com>,
dl-linux-imx <linux-imx@....com>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
CC: Varun Sethi <V.Sethi@....com>
Subject: RE: [PATCH 1/9] arm64: dts: imx8ulp-evk: add caam jr
Hi Peng,
It is the single patch.
I have re-send this patch with correct subject.
Regards
Pankaj
> -----Original Message-----
> From: Peng Fan (OSS) <peng.fan@....nxp.com>
> Sent: Monday, June 26, 2023 6:56 AM
> To: Pankaj Gupta <pankaj.gupta@....com>; robh+dt@...nel.org;
> krzysztof.kozlowski+dt@...aro.org; conor+dt@...nel.org;
> shawnguo@...nel.org; s.hauer@...gutronix.de; kernel@...gutronix.de;
> festevam@...il.com; dl-linux-imx <linux-imx@....com>;
> devicetree@...r.kernel.org; linux-arm-kernel@...ts.infradead.org; linux-
> kernel@...r.kernel.org
> Cc: Varun Sethi <V.Sethi@....com>
> Subject: Re: [PATCH 1/9] arm64: dts: imx8ulp-evk: add caam jr
>
> Just a single patch? or this belongs to a patchset?
>
> Regards,
> Peng.
>
> On 6/17/2023 1:40 AM, Pankaj Gupta wrote:
> >
> >
> > Add crypto node in device tree for:
> > - CAAM job-ring
> >
> > Signed-off-by: Varun Sethi <v.sethi@....com>
> > Signed-off-by: Pankaj Gupta <pankaj.gupta@....com>
> > ---
> > arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 32
> ++++++++++++++++++++++
> > 1 file changed, 32 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> > index 32193a43ff49..ce8de81cac9a 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> > @@ -207,6 +207,38 @@ pcc3: clock-controller@...d0000 {
> > #reset-cells = <1>;
> > };
> >
> > + crypto: crypto@...e0000 {
> > + compatible = "fsl,sec-v4.0";
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + reg = <0x292e0000 0x10000>;
> > + ranges = <0 0x292e0000 0x10000>;
> > +
> > + sec_jr0: jr@...0 {
> > + compatible = "fsl,sec-v4.0-job-ring";
> > + reg = <0x1000 0x1000>;
> > + interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
> > + };
> > +
> > + sec_jr1: jr@...0 {
> > + compatible = "fsl,sec-v4.0-job-ring";
> > + reg = <0x2000 0x1000>;
> > + interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
> > + };
> > +
> > + sec_jr2: jr@...0 {
> > + compatible = "fsl,sec-v4.0-job-ring";
> > + reg = <0x3000 0x1000>;
> > + interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
> > + };
> > +
> > + sec_jr3: jr@...0 {
> > + compatible = "fsl,sec-v4.0-job-ring";
> > + reg = <0x4000 0x1000>;
> > + interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
> > + };
> > + };
> > +
> > tpm5: tpm@...40000 {
> > compatible = "fsl,imx8ulp-tpm", "fsl,imx7ulp-tpm";
> > reg = <0x29340000 0x1000>;
> > --
> > 2.34.1
> >
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