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Message-ID: <20230626-immunity-lagged-eaae0182ad0c@spud>
Date: Mon, 26 Jun 2023 18:18:28 +0100
From: Conor Dooley <conor@...nel.org>
To: Chris Packham <chris.packham@...iedtelesis.co.nz>
Cc: miquel.raynal@...tlin.com, richard@....at, vigneshr@...com,
robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
conor+dt@...nel.org, gregory.clement@...tlin.com,
pierre.gondois@....com, arnd@...db.de, f.fainelli@...il.com,
linux-mtd@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v2 1/3] dt-bindings: mtd: Add AC5 specific binding
On Mon, Jun 26, 2023 at 03:12:15PM +1200, Chris Packham wrote:
> Add binding for AC5 SoC. This SoC only supports NAND SDR timings up to
> mode 3 so a specific compatible value is needed.
>
> Signed-off-by: Chris Packham <chris.packham@...iedtelesis.co.nz>
Acked-by: Conor Dooley <conor.dooley@...rochip.com>
Cheers,
Conor.
> ---
>
> Notes:
> Changes in v2:
> - Keep compatibles in alphabetical order
> - Explain AC5 limitations in commit message
>
> .../devicetree/bindings/mtd/marvell,nand-controller.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/mtd/marvell,nand-controller.yaml b/Documentation/devicetree/bindings/mtd/marvell,nand-controller.yaml
> index a10729bb1840..1ecea848e8b9 100644
> --- a/Documentation/devicetree/bindings/mtd/marvell,nand-controller.yaml
> +++ b/Documentation/devicetree/bindings/mtd/marvell,nand-controller.yaml
> @@ -16,6 +16,7 @@ properties:
> - const: marvell,armada-8k-nand-controller
> - const: marvell,armada370-nand-controller
> - enum:
> + - marvell,ac5-nand-controller
> - marvell,armada370-nand-controller
> - marvell,pxa3xx-nand-controller
> - description: legacy bindings
> --
> 2.41.0
>
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