lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <6ewtsaw72474pwvdohpapwnmbevivlkmagwnv7r7ggixhhmo6e@fcl74rn2rlqz>
Date:   Tue, 27 Jun 2023 15:54:49 +0300
From:   Serge Semin <fancer.lancer@...il.com>
To:     Sebastian Reichel <sebastian.reichel@...labora.com>
Cc:     linux-pci@...r.kernel.org, linux-rockchip@...ts.infradead.org,
        Jingoo Han <jingoohan1@...il.com>,
        Gustavo Pimentel <gustavo.pimentel@...opsys.com>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Lorenzo Pieralisi <lpieralisi@...nel.org>,
        Krzysztof WilczyƄski <kw@...ux.com>,
        Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Heiko Stuebner <heiko@...ech.de>,
        Shawn Lin <shawn.lin@...k-chips.com>,
        Simon Xue <xxm@...k-chips.com>, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        kernel@...labora.com
Subject: Re: [PATCH v1 2/4] dt-bindings: PCI: dwc: rockchip: Add missing
 legacy-interrupt-controller

On Fri, Jun 16, 2023 at 07:00:20PM +0200, Sebastian Reichel wrote:
> Rockchip RK356x and RK3588 handle legacy interrupts via a ganged
> interrupts. The RK356x DT implements this via a sub-node named
> "legacy-interrupt-controller", just like a couple of other PCIe
> implementations. This adds proper documentation for this and updates
> the example to avoid regressions.
> 
> Signed-off-by: Sebastian Reichel <sebastian.reichel@...labora.com>
> ---
>  .../bindings/pci/rockchip-dw-pcie.yaml        | 24 +++++++++++++++++++
>  1 file changed, 24 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml
> index 98e45d2d8dfe..bf81d306cc80 100644
> --- a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml
> @@ -67,6 +67,22 @@ properties:
>        - const: legacy
>        - const: err
>  
> +  legacy-interrupt-controller:
> +    description: Interrupt controller node for handling legacy PCI interrupts.
> +    type: object
> +    properties:
> +      "#address-cells":
> +        const: 0
> +
> +      "#interrupt-cells":
> +        const: 1
> +

> +      "interrupt-controller": true

redundant quotes.

> +
> +      interrupts:
> +        items:
> +          - description: combined legacy interrupt

Missing the "additionalProperties" qualifier and the "required"
property.

-Serge(y)

> +
>    msi-map: true
>  
>    num-lanes: true
> @@ -148,6 +164,14 @@ examples:
>              reset-names = "pipe";
>              #address-cells = <3>;
>              #size-cells = <2>;
> +
> +            legacy-interrupt-controller {
> +                interrupt-controller;
> +                #address-cells = <0>;
> +                #interrupt-cells = <1>;
> +                interrupt-parent = <&gic>;
> +                interrupts = <GIC_SPI 72 IRQ_TYPE_EDGE_RISING>;
> +            };
>          };
>      };
>  ...
> -- 
> 2.39.2
> 

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ