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Message-ID: <20230703035044.2063303-2-chris.packham@alliedtelesis.co.nz>
Date: Mon, 3 Jul 2023 15:50:42 +1200
From: Chris Packham <chris.packham@...iedtelesis.co.nz>
To: miquel.raynal@...tlin.com, richard@....at, vigneshr@...com,
robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
conor+dt@...nel.org, gregory.clement@...tlin.com
Cc: linux-mtd@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Chris Packham <chris.packham@...iedtelesis.co.nz>
Subject: [PATCH v3 1/3] dt-bindings: mtd: Add AC5 specific binding
Add binding for AC5 SoC. This SoC only supports NAND SDR timings up to
mode 3 so a specific compatible value is needed.
Signed-off-by: Chris Packham <chris.packham@...iedtelesis.co.nz>
Acked-by: Conor Dooley <conor.dooley@...rochip.com>
---
Notes:
Changes in v3:
- Collect ack from Conor
Changes in v2:
- Keep compatibles in alphabetical order
- Explain AC5 limitations in commit message
.../devicetree/bindings/mtd/marvell,nand-controller.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/mtd/marvell,nand-controller.yaml b/Documentation/devicetree/bindings/mtd/marvell,nand-controller.yaml
index a10729bb1840..1ecea848e8b9 100644
--- a/Documentation/devicetree/bindings/mtd/marvell,nand-controller.yaml
+++ b/Documentation/devicetree/bindings/mtd/marvell,nand-controller.yaml
@@ -16,6 +16,7 @@ properties:
- const: marvell,armada-8k-nand-controller
- const: marvell,armada370-nand-controller
- enum:
+ - marvell,ac5-nand-controller
- marvell,armada370-nand-controller
- marvell,pxa3xx-nand-controller
- description: legacy bindings
--
2.41.0
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