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Message-ID: <6307c5b2-64d2-405f-b1a5-696d4184f6a0@sirena.org.uk>
Date:   Tue, 4 Jul 2023 14:16:13 +0100
From:   Mark Brown <broonie@...nel.org>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Cc:     William Qiu <william.qiu@...rfivetech.com>,
        devicetree@...r.kernel.org, linux-spi@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Emil Renner Berthing <kernel@...il.dk>,
        Linus Walleij <linus.walleij@...aro.org>
Subject: Re: [RESEND v1 2/2] riscv: dts: starfive: Add spi node for JH7110 SoC

On Tue, Jul 04, 2023 at 02:27:57PM +0200, Krzysztof Kozlowski wrote:

> Also see:
> "every Co-developed-by: must be immediately
> followed by a Signed-off-by: of the associated co-author."

> https://elixir.bootlin.com/linux/v6.4/source/Documentation/process/submitting-patches.rst#L467

Oh, that seems unhelpful especially with it not lining up with the DCO.

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