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Message-ID: <c5027d42-b9be-090d-bd43-86c9b1448c99@starfivetech.com>
Date:   Wed, 5 Jul 2023 11:37:40 +0800
From:   William Qiu <william.qiu@...rfivetech.com>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
        <devicetree@...r.kernel.org>, <linux-spi@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <linux-riscv@...ts.infradead.org>
CC:     Mark Brown <broonie@...nel.org>, Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Emil Renner Berthing <kernel@...il.dk>,
        Linus Walleij <linus.walleij@...aro.org>
Subject: Re: [RESEND v1 1/2] dt-binding: spi: constrain minItems of clocks and
 clock-names



On 2023/7/4 17:38, Krzysztof Kozlowski wrote:
> On 04/07/2023 11:21, William Qiu wrote:
>> The SPI controller only need apb_pclk clock to work properly on JH7110 SoC,
>> so there add minItems whose value is equal to 1. Other platforms do not
>> have this constraint.
>> 
>> Signed-off-by: William Qiu <william.qiu@...rfivetech.com>
> 
> I don't get why this is resent, but subject prefix is still wrong. It's
> dt-bindings.
> 
Will update.
>> ---
>>  Documentation/devicetree/bindings/spi/spi-pl022.yaml | 11 ++++++++---
>>  1 file changed, 8 insertions(+), 3 deletions(-)
>> 
>> diff --git a/Documentation/devicetree/bindings/spi/spi-pl022.yaml b/Documentation/devicetree/bindings/spi/spi-pl022.yaml
>> index 91e540a92faf..42bb34c39971 100644
>> --- a/Documentation/devicetree/bindings/spi/spi-pl022.yaml
>> +++ b/Documentation/devicetree/bindings/spi/spi-pl022.yaml
>> @@ -11,6 +11,7 @@ maintainers:
>> 
>>  allOf:
>>    - $ref: spi-controller.yaml#
>> +  - $ref: /schemas/arm/primecell.yaml#
> 
> This looks unrelated, so keep it as separate commit with its own rationale.
> 
Because "arm,primecell-periphid"  is need in JH7110 SoC, so I added them in
one commit, so do I need to put them in two commit?
>> 
>>  # We need a select here so we don't match all nodes with 'arm,primecell'
>>  select:
>> @@ -34,12 +35,16 @@ properties:
>>      maxItems: 1
>> 
>>    clocks:
>> +    minItems: 1
>>      maxItems: 2
>> 
>>    clock-names:
>> -    items:
>> -      - const: sspclk
>> -      - const: apb_pclk
>> +    oneOf:
>> +      - items:
>> +          - const: apb_pclk
>> +      - items:
>> +          - const: sspclk
>> +          - const: apb_pclk
> 
> Are you sure that your clock is APB pclk in such case?
> 
Yes, in JH7110 SoC is APB pclk in such case.

Thanks for taking time to review this patch series.
> Best regards,
> Krzysztof
> 

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