[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <a19dde63-2f84-4256-fd3d-101b5c471fda@intel.com>
Date: Wed, 5 Jul 2023 10:43:00 -0700
From: Dave Jiang <dave.jiang@...el.com>
To: Dan Carpenter <dan.carpenter@...aro.org>,
Vishal Verma <vishal.l.verma@...el.com>
CC: Alison Schofield <alison.schofield@...el.com>,
Ira Weiny <ira.weiny@...el.com>,
Ben Widawsky <bwidawsk@...nel.org>,
Dan Williams <dan.j.williams@...el.com>,
Jonathan Cameron <Jonathan.Cameron@...wei.com>,
<linux-cxl@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<kernel-janitors@...r.kernel.org>
Subject: Re: [PATCH] cxl/mem: Fix a double shift bug
On 7/3/23 07:17, Dan Carpenter wrote:
> The CXL_FW_CANCEL macro is used with set/test_bit() so it should be a
> bit number and not the shifted value. The original code is the
> equivalent of using BIT(BIT(0)) so it's 0x2 instead of 0x1. This has
> no effect on runtime because it's done consistently and nothing else
> was using the 0x2 bit.
>
> Fixes: 9521875bbe00 ("cxl: add a firmware update mechanism using the sysfs firmware loader")
> Signed-off-by: Dan Carpenter <dan.carpenter@...aro.org>
Reviewed-by: Dave Jiang <dave.jiang@...el.com>
> ---
> drivers/cxl/cxlmem.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/cxl/cxlmem.h b/drivers/cxl/cxlmem.h
> index 79e99c873ca2..499113328586 100644
> --- a/drivers/cxl/cxlmem.h
> +++ b/drivers/cxl/cxlmem.h
> @@ -323,7 +323,7 @@ struct cxl_mbox_activate_fw {
>
> /* FW state bits */
> #define CXL_FW_STATE_BITS 32
> -#define CXL_FW_CANCEL BIT(0)
> +#define CXL_FW_CANCEL 0
>
> /**
> * struct cxl_fw_state - Firmware upload / activation state
Powered by blists - more mailing lists