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Message-ID: <ljlzer7ao37l77ljmuhb7x7wpdl45a75xxins63wlg6n2hfuae@54gsbuo4qlcw>
Date: Wed, 12 Jul 2023 11:03:23 -0700
From: Davidlohr Bueso <dave@...olabs.net>
To: Dan Carpenter <dan.carpenter@...aro.org>
Cc: Vishal Verma <vishal.l.verma@...el.com>,
Alison Schofield <alison.schofield@...el.com>,
Ira Weiny <ira.weiny@...el.com>,
Ben Widawsky <bwidawsk@...nel.org>,
Dan Williams <dan.j.williams@...el.com>,
Jonathan Cameron <Jonathan.Cameron@...wei.com>,
Dave Jiang <dave.jiang@...el.com>, linux-cxl@...r.kernel.org,
linux-kernel@...r.kernel.org, kernel-janitors@...r.kernel.org
Subject: Re: [PATCH] cxl/mem: Fix a double shift bug
On Mon, 03 Jul 2023, Dan Carpenter wrote:
>The CXL_FW_CANCEL macro is used with set/test_bit() so it should be a
>bit number and not the shifted value. The original code is the
>equivalent of using BIT(BIT(0)) so it's 0x2 instead of 0x1. This has
>no effect on runtime because it's done consistently and nothing else
>was using the 0x2 bit.
>
>Fixes: 9521875bbe00 ("cxl: add a firmware update mechanism using the sysfs firmware loader")
>Signed-off-by: Dan Carpenter <dan.carpenter@...aro.org>
Reviewed-by: Davidlohr Bueso <dave@...olabs.net>
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