[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <CAOMZO5AFjS+aGjHTYCvPO86ypXfcFnuKmU2qHZNTyDSQPxRHjQ@mail.gmail.com>
Date: Thu, 6 Jul 2023 10:22:12 -0300
From: Fabio Estevam <festevam@...il.com>
To: Andreas Henriksson <andreas@...al.se>
Cc: Shengjiu Wang <shengjiu.wang@...il.com>,
Shengjiu Wang <shengjiu.wang@....com>,
Nicolin Chen <nicoleotsuka@...il.com>,
Xiubo Li <Xiubo.Lee@...il.com>,
Liam Girdwood <lgirdwood@...il.com>,
Mark Brown <broonie@...nel.org>,
Jaroslav Kysela <perex@...ex.cz>,
Takashi Iwai <tiwai@...e.com>,
Linux-ALSA <alsa-devel@...a-project.org>,
linuxppc-dev <linuxppc-dev@...ts.ozlabs.org>,
linux-kernel <linux-kernel@...r.kernel.org>,
Hans Söderlund <hans.soderlund@...lbit.se>
Subject: Re: [PATCH] ASoC: fsl_sai: Enable MCTL_MCLK_EN bit for master mode
Hi Andreas,
On Thu, Jul 6, 2023 at 9:34 AM Andreas Henriksson <andreas@...al.se> wrote:
> I think your initial review comment was spot on Fabio. There probably
> needs to be a(n imx8mm) specific flag that says when this workaround
> should be applied and gate the code in bclk function on that.
> Atleast that's the only thing I can think of if my interpretation of the
> problem for imx8mm is correct.
Yes, deciding whether MCLK_EN should act as a clock gate based on
the number of SAI registers seems fragile to me.
I have sent a proposal as RFC. Please give it a try if you have a chance.
I would like Shengjiu to confirm if imx8mn and imx93 should also
behave like imx8mm in this aspect.
Cheers
Powered by blists - more mailing lists