| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <9d5bd17f37772be186cab17b06cc21351d36ff62.1688986332.git.michal.simek@amd.com>
Date: Mon, 10 Jul 2023 12:52:19 +0200
From: Michal Simek <michal.simek@....com>
To: <linux-kernel@...r.kernel.org>, <monstr@...str.eu>,
<michal.simek@...inx.com>, <git@...inx.com>,
<laurent.pinchart@...asonboard.com>
CC: Conor Dooley <conor+dt@...nel.org>,
Harini Katakam <harini.katakam@....com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Michael Grzeschik <m.grzeschik@...gutronix.de>,
Parth Gajjar <parth.gajjar@....com>,
"Radhey Shyam Pandey" <radhey.shyam.pandey@....com>,
Rob Herring <robh+dt@...nel.org>,
Tanmay Shah <tanmay.shah@....com>,
Vishal Sagar <vishal.sagar@....com>,
<devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>
Subject: [PATCH] arm64: zynqmp: Describe interrupts by using macros
Use arm-gic.h and irq.h for interrupt description. It helps to improve
readability of device tree file.
Suggested-by: Laurent Pinchart <laurent.pinchart@...asonboard.com>
Signed-off-by: Michal Simek <michal.simek@....com>
---
Discussed at https://lore.kernel.org/r/20230621141307.GC18703@pendragon.ideasonboard.com
---
arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 185 +++++++++++++++----------
1 file changed, 110 insertions(+), 75 deletions(-)
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index 74898f3a3537..b61fc99cd911 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -14,6 +14,8 @@
#include <dt-bindings/dma/xlnx-zynqmp-dpdma.h>
#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/power/xlnx-zynqmp-power.h>
#include <dt-bindings/reset/xlnx-zynqmp-resets.h>
@@ -131,7 +133,7 @@ zynqmp_ipi: zynqmp_ipi {
bootph-all;
compatible = "xlnx,zynqmp-ipi-mailbox";
interrupt-parent = <&gic>;
- interrupts = <0 35 4>;
+ interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
xlnx,ipi-id = <0>;
#address-cells = <2>;
#size-cells = <2>;
@@ -161,10 +163,10 @@ dcc: dcc {
pmu {
compatible = "arm,armv8-pmuv3";
interrupt-parent = <&gic>;
- interrupts = <0 143 4>,
- <0 144 4>,
- <0 145 4>,
- <0 146 4>;
+ interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&cpu0>,
<&cpu1>,
<&cpu2>,
@@ -187,7 +189,7 @@ zynqmp_power: zynqmp-power {
bootph-all;
compatible = "xlnx,zynqmp-power";
interrupt-parent = <&gic>;
- interrupts = <0 35 4>;
+ interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
mboxes = <&ipi_mailbox_pmu1 0>, <&ipi_mailbox_pmu1 1>;
mbox-names = "tx", "rx";
};
@@ -231,10 +233,10 @@ modepin_gpio: gpio {
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <&gic>;
- interrupts = <1 13 0xf08>,
- <1 14 0xf08>,
- <1 11 0xf08>,
- <1 10 0xf08>;
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};
fpga_full: fpga-full {
@@ -274,7 +276,7 @@ can0: can@...60000 {
status = "disabled";
clock-names = "can_clk", "pclk";
reg = <0x0 0xff060000 0x0 0x1000>;
- interrupts = <0 23 4>;
+ interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&gic>;
tx-fifo-depth = <0x40>;
rx-fifo-depth = <0x40>;
@@ -286,7 +288,7 @@ can1: can@...70000 {
status = "disabled";
clock-names = "can_clk", "pclk";
reg = <0x0 0xff070000 0x0 0x1000>;
- interrupts = <0 24 4>;
+ interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&gic>;
tx-fifo-depth = <0x40>;
rx-fifo-depth = <0x40>;
@@ -305,11 +307,11 @@ pmu@...0 {
compatible = "arm,cci-400-pmu,r1";
reg = <0x9000 0x5000>;
interrupt-parent = <&gic>;
- interrupts = <0 123 4>,
- <0 123 4>,
- <0 123 4>,
- <0 123 4>,
- <0 123 4>;
+ interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
};
};
@@ -319,7 +321,7 @@ fpd_dma_chan1: dma-controller@...00000 {
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd500000 0x0 0x1000>;
interrupt-parent = <&gic>;
- interrupts = <0 124 4>;
+ interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "clk_main", "clk_apb";
#dma-cells = <1>;
xlnx,bus-width = <128>;
@@ -332,7 +334,7 @@ fpd_dma_chan2: dma-controller@...10000 {
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd510000 0x0 0x1000>;
interrupt-parent = <&gic>;
- interrupts = <0 125 4>;
+ interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "clk_main", "clk_apb";
#dma-cells = <1>;
xlnx,bus-width = <128>;
@@ -345,7 +347,7 @@ fpd_dma_chan3: dma-controller@...20000 {
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd520000 0x0 0x1000>;
interrupt-parent = <&gic>;
- interrupts = <0 126 4>;
+ interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "clk_main", "clk_apb";
#dma-cells = <1>;
xlnx,bus-width = <128>;
@@ -358,7 +360,7 @@ fpd_dma_chan4: dma-controller@...30000 {
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd530000 0x0 0x1000>;
interrupt-parent = <&gic>;
- interrupts = <0 127 4>;
+ interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "clk_main", "clk_apb";
#dma-cells = <1>;
xlnx,bus-width = <128>;
@@ -371,7 +373,7 @@ fpd_dma_chan5: dma-controller@...40000 {
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd540000 0x0 0x1000>;
interrupt-parent = <&gic>;
- interrupts = <0 128 4>;
+ interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "clk_main", "clk_apb";
#dma-cells = <1>;
xlnx,bus-width = <128>;
@@ -384,7 +386,7 @@ fpd_dma_chan6: dma-controller@...50000 {
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd550000 0x0 0x1000>;
interrupt-parent = <&gic>;
- interrupts = <0 129 4>;
+ interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "clk_main", "clk_apb";
#dma-cells = <1>;
xlnx,bus-width = <128>;
@@ -397,7 +399,7 @@ fpd_dma_chan7: dma-controller@...60000 {
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd560000 0x0 0x1000>;
interrupt-parent = <&gic>;
- interrupts = <0 130 4>;
+ interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "clk_main", "clk_apb";
#dma-cells = <1>;
xlnx,bus-width = <128>;
@@ -410,7 +412,7 @@ fpd_dma_chan8: dma-controller@...70000 {
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd570000 0x0 0x1000>;
interrupt-parent = <&gic>;
- interrupts = <0 131 4>;
+ interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "clk_main", "clk_apb";
#dma-cells = <1>;
xlnx,bus-width = <128>;
@@ -427,7 +429,7 @@ gic: interrupt-controller@...10000 {
<0x0 0xf9060000 0x0 0x20000>;
interrupt-controller;
interrupt-parent = <&gic>;
- interrupts = <1 9 0xf04>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};
gpu: gpu@...b0000 {
@@ -435,8 +437,12 @@ gpu: gpu@...b0000 {
compatible = "xlnx,zynqmp-mali", "arm,mali-400";
reg = <0x0 0xfd4b0000 0x0 0x10000>;
interrupt-parent = <&gic>;
- interrupts = <0 132 4>, <0 132 4>, <0 132 4>,
- <0 132 4>, <0 132 4>, <0 132 4>;
+ interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "gp", "gpmmu", "pp0", "ppmmu0", "pp1", "ppmmu1";
clock-names = "bus", "core";
power-domains = <&zynqmp_firmware PD_GPU>;
@@ -451,7 +457,7 @@ lpd_dma_chan1: dma-controller@...80000 {
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xffa80000 0x0 0x1000>;
interrupt-parent = <&gic>;
- interrupts = <0 77 4>;
+ interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "clk_main", "clk_apb";
#dma-cells = <1>;
xlnx,bus-width = <64>;
@@ -464,7 +470,7 @@ lpd_dma_chan2: dma-controller@...90000 {
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xffa90000 0x0 0x1000>;
interrupt-parent = <&gic>;
- interrupts = <0 78 4>;
+ interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "clk_main", "clk_apb";
#dma-cells = <1>;
xlnx,bus-width = <64>;
@@ -477,7 +483,7 @@ lpd_dma_chan3: dma-controller@...a0000 {
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xffaa0000 0x0 0x1000>;
interrupt-parent = <&gic>;
- interrupts = <0 79 4>;
+ interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "clk_main", "clk_apb";
#dma-cells = <1>;
xlnx,bus-width = <64>;
@@ -490,7 +496,7 @@ lpd_dma_chan4: dma-controller@...b0000 {
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xffab0000 0x0 0x1000>;
interrupt-parent = <&gic>;
- interrupts = <0 80 4>;
+ interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "clk_main", "clk_apb";
#dma-cells = <1>;
xlnx,bus-width = <64>;
@@ -503,7 +509,7 @@ lpd_dma_chan5: dma-controller@...c0000 {
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xffac0000 0x0 0x1000>;
interrupt-parent = <&gic>;
- interrupts = <0 81 4>;
+ interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "clk_main", "clk_apb";
#dma-cells = <1>;
xlnx,bus-width = <64>;
@@ -516,7 +522,7 @@ lpd_dma_chan6: dma-controller@...d0000 {
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xffad0000 0x0 0x1000>;
interrupt-parent = <&gic>;
- interrupts = <0 82 4>;
+ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "clk_main", "clk_apb";
#dma-cells = <1>;
xlnx,bus-width = <64>;
@@ -529,7 +535,7 @@ lpd_dma_chan7: dma-controller@...e0000 {
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xffae0000 0x0 0x1000>;
interrupt-parent = <&gic>;
- interrupts = <0 83 4>;
+ interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "clk_main", "clk_apb";
#dma-cells = <1>;
xlnx,bus-width = <64>;
@@ -542,7 +548,7 @@ lpd_dma_chan8: dma-controller@...f0000 {
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xffaf0000 0x0 0x1000>;
interrupt-parent = <&gic>;
- interrupts = <0 84 4>;
+ interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "clk_main", "clk_apb";
#dma-cells = <1>;
xlnx,bus-width = <64>;
@@ -554,7 +560,7 @@ mc: memory-controller@...70000 {
compatible = "xlnx,zynqmp-ddrc-2.40a";
reg = <0x0 0xfd070000 0x0 0x30000>;
interrupt-parent = <&gic>;
- interrupts = <0 112 4>;
+ interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
};
nand0: nand-controller@...00000 {
@@ -563,7 +569,7 @@ nand0: nand-controller@...00000 {
reg = <0x0 0xff100000 0x0 0x1000>;
clock-names = "controller", "bus";
interrupt-parent = <&gic>;
- interrupts = <0 14 4>;
+ interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
iommus = <&smmu 0x872>;
@@ -574,7 +580,8 @@ gem0: ethernet@...b0000 {
compatible = "xlnx,zynqmp-gem", "cdns,gem";
status = "disabled";
interrupt-parent = <&gic>;
- interrupts = <0 57 4>, <0 57 4>;
+ interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x0 0xff0b0000 0x0 0x1000>;
clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
#address-cells = <1>;
@@ -589,7 +596,8 @@ gem1: ethernet@...c0000 {
compatible = "xlnx,zynqmp-gem", "cdns,gem";
status = "disabled";
interrupt-parent = <&gic>;
- interrupts = <0 59 4>, <0 59 4>;
+ interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x0 0xff0c0000 0x0 0x1000>;
clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
#address-cells = <1>;
@@ -604,7 +612,8 @@ gem2: ethernet@...d0000 {
compatible = "xlnx,zynqmp-gem", "cdns,gem";
status = "disabled";
interrupt-parent = <&gic>;
- interrupts = <0 61 4>, <0 61 4>;
+ interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x0 0xff0d0000 0x0 0x1000>;
clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
#address-cells = <1>;
@@ -619,7 +628,8 @@ gem3: ethernet@...e0000 {
compatible = "xlnx,zynqmp-gem", "cdns,gem";
status = "disabled";
interrupt-parent = <&gic>;
- interrupts = <0 63 4>, <0 63 4>;
+ interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x0 0xff0e0000 0x0 0x1000>;
clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
#address-cells = <1>;
@@ -636,7 +646,7 @@ gpio: gpio@...a0000 {
#gpio-cells = <0x2>;
gpio-controller;
interrupt-parent = <&gic>;
- interrupts = <0 16 4>;
+ interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x0 0xff0a0000 0x0 0x1000>;
@@ -647,7 +657,7 @@ i2c0: i2c@...20000 {
compatible = "cdns,i2c-r1p14";
status = "disabled";
interrupt-parent = <&gic>;
- interrupts = <0 17 4>;
+ interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <400000>;
reg = <0x0 0xff020000 0x0 0x1000>;
#address-cells = <1>;
@@ -659,7 +669,7 @@ i2c1: i2c@...30000 {
compatible = "cdns,i2c-r1p14";
status = "disabled";
interrupt-parent = <&gic>;
- interrupts = <0 18 4>;
+ interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <400000>;
reg = <0x0 0xff030000 0x0 0x1000>;
#address-cells = <1>;
@@ -676,11 +686,11 @@ pcie: pcie@...e0000 {
msi-controller;
device_type = "pci";
interrupt-parent = <&gic>;
- interrupts = <0 118 4>,
- <0 117 4>,
- <0 116 4>,
- <0 115 4>, /* MSI_1 [63...32] */
- <0 114 4>; /* MSI_0 [31...0] */
+ interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, /* MSI_1 [63...32] */
+ <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; /* MSI_0 [31...0] */
interrupt-names = "misc", "dummy", "intx",
"msi1", "msi0";
msi-parent = <&pcie>;
@@ -710,7 +720,7 @@ qspi: spi@...f0000 {
compatible = "xlnx,zynqmp-qspi-1.0";
status = "disabled";
clock-names = "ref_clk", "pclk";
- interrupts = <0 15 4>;
+ interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&gic>;
num-cs = <1>;
reg = <0x0 0xff0f0000 0x0 0x1000>,
@@ -735,7 +745,8 @@ rtc: rtc@...60000 {
status = "disabled";
reg = <0x0 0xffa60000 0x0 0x100>;
interrupt-parent = <&gic>;
- interrupts = <0 26 4>, <0 27 4>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "alarm", "sec";
calibration = <0x7FFF>;
};
@@ -745,7 +756,7 @@ sata: ahci@...c0000 {
status = "disabled";
reg = <0x0 0xfd0c0000 0x0 0x2000>;
interrupt-parent = <&gic>;
- interrupts = <0 133 4>;
+ interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&zynqmp_firmware PD_SATA>;
resets = <&zynqmp_reset ZYNQMP_RESET_SATA>;
iommus = <&smmu 0x4c0>, <&smmu 0x4c1>,
@@ -757,7 +768,7 @@ sdhci0: mmc@...60000 {
compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
status = "disabled";
interrupt-parent = <&gic>;
- interrupts = <0 48 4>;
+ interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x0 0xff160000 0x0 0x1000>;
clock-names = "clk_xin", "clk_ahb";
iommus = <&smmu 0x870>;
@@ -772,7 +783,7 @@ sdhci1: mmc@...70000 {
compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
status = "disabled";
interrupt-parent = <&gic>;
- interrupts = <0 49 4>;
+ interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x0 0xff170000 0x0 0x1000>;
clock-names = "clk_xin", "clk_ahb";
iommus = <&smmu 0x871>;
@@ -789,18 +800,30 @@ smmu: iommu@...00000 {
status = "disabled";
#global-interrupts = <1>;
interrupt-parent = <&gic>;
- interrupts = <0 155 4>,
- <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
- <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
- <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
- <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>;
+ interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
};
spi0: spi@...40000 {
compatible = "cdns,spi-r1p6";
status = "disabled";
interrupt-parent = <&gic>;
- interrupts = <0 19 4>;
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x0 0xff040000 0x0 0x1000>;
clock-names = "ref_clk", "pclk";
#address-cells = <1>;
@@ -812,7 +835,7 @@ spi1: spi@...50000 {
compatible = "cdns,spi-r1p6";
status = "disabled";
interrupt-parent = <&gic>;
- interrupts = <0 20 4>;
+ interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x0 0xff050000 0x0 0x1000>;
clock-names = "ref_clk", "pclk";
#address-cells = <1>;
@@ -824,7 +847,9 @@ ttc0: timer@...10000 {
compatible = "cdns,ttc";
status = "disabled";
interrupt-parent = <&gic>;
- interrupts = <0 36 4>, <0 37 4>, <0 38 4>;
+ interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x0 0xff110000 0x0 0x1000>;
timer-width = <32>;
power-domains = <&zynqmp_firmware PD_TTC_0>;
@@ -834,7 +859,9 @@ ttc1: timer@...20000 {
compatible = "cdns,ttc";
status = "disabled";
interrupt-parent = <&gic>;
- interrupts = <0 39 4>, <0 40 4>, <0 41 4>;
+ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x0 0xff120000 0x0 0x1000>;
timer-width = <32>;
power-domains = <&zynqmp_firmware PD_TTC_1>;
@@ -844,7 +871,9 @@ ttc2: timer@...30000 {
compatible = "cdns,ttc";
status = "disabled";
interrupt-parent = <&gic>;
- interrupts = <0 42 4>, <0 43 4>, <0 44 4>;
+ interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x0 0xff130000 0x0 0x1000>;
timer-width = <32>;
power-domains = <&zynqmp_firmware PD_TTC_2>;
@@ -854,7 +883,9 @@ ttc3: timer@...40000 {
compatible = "cdns,ttc";
status = "disabled";
interrupt-parent = <&gic>;
- interrupts = <0 45 4>, <0 46 4>, <0 47 4>;
+ interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x0 0xff140000 0x0 0x1000>;
timer-width = <32>;
power-domains = <&zynqmp_firmware PD_TTC_3>;
@@ -865,7 +896,7 @@ uart0: serial@...00000 {
compatible = "xlnx,zynqmp-uart", "cdns,uart-r1p12";
status = "disabled";
interrupt-parent = <&gic>;
- interrupts = <0 21 4>;
+ interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x0 0xff000000 0x0 0x1000>;
clock-names = "uart_clk", "pclk";
power-domains = <&zynqmp_firmware PD_UART_0>;
@@ -876,7 +907,7 @@ uart1: serial@...10000 {
compatible = "xlnx,zynqmp-uart", "cdns,uart-r1p12";
status = "disabled";
interrupt-parent = <&gic>;
- interrupts = <0 22 4>;
+ interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x0 0xff010000 0x0 0x1000>;
clock-names = "uart_clk", "pclk";
power-domains = <&zynqmp_firmware PD_UART_1>;
@@ -901,7 +932,9 @@ dwc3_0: usb@...00000 {
reg = <0x0 0xfe200000 0x0 0x40000>;
interrupt-parent = <&gic>;
interrupt-names = "host", "peripheral", "otg";
- interrupts = <0 65 4>, <0 65 4>, <0 69 4>;
+ interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "bus_early", "ref";
iommus = <&smmu 0x860>;
snps,quirk-frame-length-adjustment = <0x20>;
@@ -928,7 +961,9 @@ dwc3_1: usb@...00000 {
reg = <0x0 0xfe300000 0x0 0x40000>;
interrupt-parent = <&gic>;
interrupt-names = "host", "peripheral", "otg";
- interrupts = <0 70 4>, <0 70 4>, <0 74 4>;
+ interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "bus_early", "ref";
iommus = <&smmu 0x861>;
snps,quirk-frame-length-adjustment = <0x20>;
@@ -941,7 +976,7 @@ watchdog0: watchdog@...d0000 {
compatible = "cdns,wdt-r1p2";
status = "disabled";
interrupt-parent = <&gic>;
- interrupts = <0 113 1>;
+ interrupts = <GIC_SPI 113 IRQ_TYPE_EDGE_RISING>;
reg = <0x0 0xfd4d0000 0x0 0x1000>;
timeout-sec = <60>;
reset-on-timeout;
@@ -951,7 +986,7 @@ lpd_watchdog: watchdog@...50000 {
compatible = "cdns,wdt-r1p2";
status = "disabled";
interrupt-parent = <&gic>;
- interrupts = <0 52 1>;
+ interrupts = <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>;
reg = <0x0 0xff150000 0x0 0x1000>;
timeout-sec = <10>;
};
@@ -960,7 +995,7 @@ xilinx_ams: ams@...50000 {
compatible = "xlnx,zynqmp-ams";
status = "disabled";
interrupt-parent = <&gic>;
- interrupts = <0 56 4>;
+ interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x0 0xffa50000 0x0 0x800>;
#address-cells = <1>;
#size-cells = <1>;
@@ -986,7 +1021,7 @@ zynqmp_dpdma: dma-controller@...c0000 {
compatible = "xlnx,zynqmp-dpdma";
status = "disabled";
reg = <0x0 0xfd4c0000 0x0 0x1000>;
- interrupts = <0 122 4>;
+ interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&gic>;
clock-names = "axi_clk";
power-domains = <&zynqmp_firmware PD_DP>;
@@ -1002,7 +1037,7 @@ zynqmp_dpsub: display@...a0000 {
<0x0 0xfd4ab000 0x0 0x1000>,
<0x0 0xfd4ac000 0x0 0x1000>;
reg-names = "dp", "blend", "av_buf", "aud";
- interrupts = <0 119 4>;
+ interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&gic>;
clock-names = "dp_apb_clk", "dp_aud_clk",
"dp_vtc_pixel_clk_in";
--
2.36.1
Powered by blists - more mailing lists