[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20230711150808.18714-2-vesa.jaaskelainen@vaisala.com>
Date: Tue, 11 Jul 2023 18:08:04 +0300
From: Vesa Jääskeläinen
<vesa.jaaskelainen@...sala.com>
To: unlisted-recipients:; (no To-header on input)
Cc: vesa.jaaskelainen@...sala.com, Wei Fang <wei.fang@....com>,
Shenwei Wang <shenwei.wang@....com>,
Clark Wang <xiaoning.wang@....com>,
NXP Linux Team <linux-imx@....com>,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Russell King <linux@...linux.org.uk>,
Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>, netdev@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org
Subject: [PATCH 1/2] dt-bindings: net: fsl,fec: Add TX clock controls
With fsl,fec-tx-clock-output one can control if TX clock is routed outside
of the chip.
With fsl,fec-tx-clk-as-ref-clock one can select if external TX clock is as
reference clock.
Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@...sala.com>
---
.../devicetree/bindings/net/fsl,fec.yaml | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/Documentation/devicetree/bindings/net/fsl,fec.yaml b/Documentation/devicetree/bindings/net/fsl,fec.yaml
index b494e009326e..c09105878bc6 100644
--- a/Documentation/devicetree/bindings/net/fsl,fec.yaml
+++ b/Documentation/devicetree/bindings/net/fsl,fec.yaml
@@ -166,6 +166,21 @@ properties:
description:
If present, indicates that the hardware supports waking up via magic packet.
+ fsl,fec-tx-clock-output:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description:
+ If present, ENETx_TX_CLK output driver is enabled.
+ If not present, ENETx_TX_CLK output driver is disabled.
+
+ fsl,fec-tx-clk-as-ref-clock:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description:
+ If present, gets ENETx TX reference clk from the ENETx_TX_CLK pin. In
+ this use case, an external OSC provides the clock for both the external
+ PHY and the internal controller.
+ If not present, ENETx TX reference clock is driven by ref_enetpllx. This
+ clock is also output to pins via the IOMUX.ENET_REF_CLKx function.
+
fsl,err006687-workaround-present:
$ref: /schemas/types.yaml#/definitions/flag
description:
--
2.34.1
Powered by blists - more mailing lists