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Message-ID: <fae63cee-042a-ee9b-2f8a-ff7895543df4@foss.st.com>
Date: Tue, 11 Jul 2023 10:26:58 +0200
From: Alexandre TORGUE <alexandre.torgue@...s.st.com>
To: Etienne Carriere <etienne.carriere@...s.st.com>,
<linux-kernel@...r.kernel.org>
CC: <linux-arm-kernel@...ts.infradead.org>,
<linux-stm32@...md-mailman.stormreply.com>,
<devicetree@...r.kernel.org>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
Conor Dooley <conor+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Rob Herring <robh+dt@...nel.org>
Subject: Re: [PATCH] ARM: dts: stm32: leverage OP-TEE ASync notif on
STM32MP13x Soc family
Hi Etienne
On 7/10/23 17:05, Etienne Carriere wrote:
> Enables use of GIC PPI#15 for OP-TEE asynchronous notifications
> on stm32mp13 platforms.
>
> Signed-off-by: Etienne Carriere <etienne.carriere@...s.st.com>
> ---
> arch/arm/boot/dts/st/stm32mp131.dtsi | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm/boot/dts/st/stm32mp131.dtsi b/arch/arm/boot/dts/st/stm32mp131.dtsi
> index d163c267e34c..02f872b99f1d 100644
> --- a/arch/arm/boot/dts/st/stm32mp131.dtsi
> +++ b/arch/arm/boot/dts/st/stm32mp131.dtsi
> @@ -33,6 +33,8 @@ firmware {
> optee {
> method = "smc";
> compatible = "linaro,optee-tz";
> + interrupt-parent = <&intc>;
> + interrupts = <GIC_PPI 15 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
> };
>
> scmi: scmi {
Applied on stm32-next.
Thanks.
Alex
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