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Message-ID: <52950ea0-2671-ff16-e115-c6f236a8e353@starfivetech.com>
Date: Wed, 12 Jul 2023 11:24:08 +0800
From: Hal Feng <hal.feng@...rfivetech.com>
To: Xingyu Wu <xingyu.wu@...rfivetech.com>,
<linux-riscv@...ts.infradead.org>, <devicetree@...r.kernel.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@...aro.org>,
Philipp Zabel <p.zabel@...gutronix.de>,
Conor Dooley <conor@...nel.org>,
"Emil Renner Berthing" <emil.renner.berthing@...onical.com>
CC: Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
William Qiu <william.qiu@...rfivetech.com>,
<linux-kernel@...r.kernel.org>, <linux-clk@...r.kernel.org>
Subject: Re: [RESEND PATCH v6 5/7] clk: starfive: jh7110-sys: Add PLL clocks
source from DTS
On Tue, 4 Jul 2023 14:46:08 +0800, Xingyu Wu wrote:
> Modify PLL clocks source to be got from DTS or
> the fixed factor clocks.
>
> Signed-off-by: Xingyu Wu <xingyu.wu@...rfivetech.com>
Reviewed-by: Hal Feng <hal.feng@...rfivetech.com>
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