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Message-ID: <20230713090015.127541-3-william.qiu@starfivetech.com>
Date: Thu, 13 Jul 2023 17:00:14 +0800
From: William Qiu <william.qiu@...rfivetech.com>
To: <devicetree@...r.kernel.org>, <linux-spi@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <linux-riscv@...ts.infradead.org>
CC: Mark Brown <broonie@...nel.org>, Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Emil Renner Berthing <kernel@...il.dk>,
Linus Walleij <linus.walleij@...aro.org>,
William Qiu <william.qiu@...rfivetech.com>
Subject: [PATCH v2 2/3] dt-bindings: spi: constrain minItems of clocks and clock-names
The SPI controller only need apb_pclk clock to work properly on JH7110 SoC,
so there add minItems whose value is equal to 1. Other platforms do not
have this constraint.
Signed-off-by: William Qiu <william.qiu@...rfivetech.com>
---
Documentation/devicetree/bindings/spi/spi-pl022.yaml | 10 +++++++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/spi/spi-pl022.yaml b/Documentation/devicetree/bindings/spi/spi-pl022.yaml
index 5e5a704a766e..42bb34c39971 100644
--- a/Documentation/devicetree/bindings/spi/spi-pl022.yaml
+++ b/Documentation/devicetree/bindings/spi/spi-pl022.yaml
@@ -35,12 +35,16 @@ properties:
maxItems: 1
clocks:
+ minItems: 1
maxItems: 2
clock-names:
- items:
- - const: sspclk
- - const: apb_pclk
+ oneOf:
+ - items:
+ - const: apb_pclk
+ - items:
+ - const: sspclk
+ - const: apb_pclk
pl022,autosuspend-delay:
description: delay in ms following transfer completion before the
--
2.34.1
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