lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-Id: <20230717173512.65169-1-sebastian.reichel@collabora.com>
Date:   Mon, 17 Jul 2023 19:35:10 +0200
From:   Sebastian Reichel <sebastian.reichel@...labora.com>
To:     linux-phy@...ts.infradead.org, linux-rockchip@...ts.infradead.org
Cc:     Jingoo Han <jingoohan1@...il.com>,
        Gustavo Pimentel <gustavo.pimentel@...opsys.com>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Lorenzo Pieralisi <lpieralisi@...nel.org>,
        Vinod Koul <vkoul@...nel.org>,
        Kishon Vijay Abraham I <kishon@...nel.org>,
        Krzysztof WilczyƄski <kw@...ux.com>,
        Rob Herring <robh@...nel.org>,
        Serge Semin <fancer.lancer@...il.com>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Heiko Stuebner <heiko@...ech.de>,
        Shawn Lin <shawn.lin@...k-chips.com>,
        Simon Xue <xxm@...k-chips.com>, John Clark <inindev@...il.com>,
        Qu Wenruo <wqu@...e.com>, devicetree@...r.kernel.org,
        linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        Sebastian Reichel <sebastian.reichel@...labora.com>,
        kernel@...labora.com
Subject: [PATCH v2 0/2] RK3588 PCIe3 support

Hi,

This adds PCIe v3 support for RK3588. The series depends on the PCIe
v2 series [0], since the the same binding is used. It has been tested
on Rockchip EVB1 and Radxa Rock 5B.

Note, that the PCIe3 PHY driver is currently missing bifurcation
support for RK3588. Thus after this series only PCIe3x4 is usable
(in aggregated x4 mode) without adding support for the PHY's
"rockchip,pcie30-phymode" DT property, which allows configuring
how the lanes are distributed. Aggregated 3x4 mode seems to be the
most common configuration. Both EVB1 and Rock 5B use it, so I
cannot test anything else anyways.

[0] https://lore.kernel.org/all/20230717172651.64324-1-sebastian.reichel@collabora.com/

Changes since v1:
 * https://lore.kernel.org/all/20230714175331.112923-1-sebastian.reichel@collabora.com/
 * Collected Acked-by from Conor Dooley
 * Dropped deprecated and useless num-ib-windows/num-ob-windows/num-viewport
   properties from DT (Serge Semin)

-- Sebastian

Sebastian Reichel (2):
  dt-bindings: phy: rockchip: add RK3588 PCIe v3 phy
  arm64: dts: rockchip: rk3588: add PCIe3 support

 .../bindings/phy/rockchip,pcie3-phy.yaml      |  33 ++++-
 arch/arm64/boot/dts/rockchip/rk3588.dtsi      | 120 ++++++++++++++++++
 2 files changed, 148 insertions(+), 5 deletions(-)

-- 
2.40.1

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ