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Message-ID: <bda79e85-c0bf-8d59-2750-d922a59bb859@redhat.com>
Date: Tue, 18 Jul 2023 13:41:08 +0200
From: Paolo Bonzini <pbonzini@...hat.com>
To: Maxim Levitsky <mlevitsk@...hat.com>, kvm@...r.kernel.org
Cc: "H. Peter Anvin" <hpa@...or.com>,
Sean Christopherson <seanjc@...gle.com>,
linux-kernel@...r.kernel.org, Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>,
Dave Hansen <dave.hansen@...ux.intel.com>, x86@...nel.org,
Borislav Petkov <bp@...en8.de>
Subject: Re: [PATCH 1/3] KVM: x86: VMX: __kvm_apic_update_irr must update the
IRR atomically
On 7/18/23 11:13, Maxim Levitsky wrote:
> + irr_val = READ_ONCE(*((u32 *)(regs + APIC_IRR + i * 0x10)));
Let's separate out the complicated arithmetic, as it recurs below too:
u32 *p_irr = (u32 *)(regs + APIC_IRR + i * 0x10);
> + while (!try_cmpxchg(((u32 *)(regs + APIC_IRR + i * 0x10)),
> + &irr_val, irr_val | pir_val));
> +
> prev_irr_val = irr_val;
> - irr_val |= xchg(&pir[i], 0);
> - *((u32 *)(regs + APIC_IRR + i * 0x10)) = irr_val;
> - if (prev_irr_val != irr_val) {
> - max_updated_irr =
> - __fls(irr_val ^ prev_irr_val) + vec;
> - }
> + irr_val |= pir_val;
> +
> + if (prev_irr_val != irr_val)
> + max_updated_irr = __fls(irr_val ^ prev_irr_val) + vec;
We can write this a bit more cleanly too, and avoid unnecessary
try_cmpxchg too:
prev_irr_val = irr_val;
do
irr_val = prev_irr_val | pir_val;
while (prev_irr_val != irr_val &&
!try_cmpxchg(p_irr, &prev_irr_val, irr_val));
if (prev_irr_val != irr_val)
max_updated_irr = __fls(irr_val ^ prev_irr_val) + vec;
If this looks okay to you, I'll queue the patches for -rc3 and also Cc
them for inclusion in stable kernels.
Paolo
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