[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <ZLg2oObBfmhSzTFg@lizhi-Precision-Tower-5810>
Date: Wed, 19 Jul 2023 15:16:48 -0400
From: Frank Li <Frank.li@....com>
To: Manivannan Sadhasivam <mani@...nel.org>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
helgaas@...nel.org, imx@...ts.linux.dev, bhelgaas@...gle.com,
devicetree@...r.kernel.org, gustavo.pimentel@...opsys.com,
kw@...ux.com, leoyang.li@....com,
linux-arm-kernel@...ts.infradead.org, linux-imx@....com,
linux-kernel@...r.kernel.org, linux-pci@...r.kernel.org,
lorenzo.pieralisi@....com, minghuan.lian@....com,
mingkai.hu@....com, robh+dt@...nel.org, roy.zang@....com,
shawnguo@...nel.org, zhiqiang.hou@....com
Subject: Re: [PATCH v3 1/2] PCI: dwc: Implement general suspend/resume
functionality for L2/L3 transitions
On Tue, Jul 18, 2023 at 03:34:00PM +0530, Manivannan Sadhasivam wrote:
> On Mon, Jul 17, 2023 at 02:36:19PM -0400, Frank Li wrote:
>
> Fine then. But can we check for PM_LINKST_IN_L2 SII System Information Interface
> (SII) instead of LTSSM state?
>
where define PM_LINKST_IN_L2? I just find one at
drivers/pci/controller/dwc/pcie-qcom.c:#define PARF_DEBUG_CNT_PM_LINKST_IN_L2 0xc04
Frank
Powered by blists - more mailing lists