linux-kernel - Re: [PATCH 05/11] RISC-V: drivers/iommu/riscv: Add sysfs interface

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <2556751a-c439-bb69-a102-583dd985fc5e@linux.intel.com>
Date:   Thu, 20 Jul 2023 20:50:43 +0800
From:   Baolu Lu <baolu.lu@...ux.intel.com>
To:     Tomasz Jeznach <tjeznach@...osinc.com>,
        Joerg Roedel <joro@...tes.org>, Will Deacon <will@...nel.org>,
        Robin Murphy <robin.murphy@....com>,
        Paul Walmsley <paul.walmsley@...ive.com>
Cc:     baolu.lu@...ux.intel.com, Palmer Dabbelt <palmer@...belt.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        Anup Patel <apatel@...tanamicro.com>,
        Sunil V L <sunilvl@...tanamicro.com>,
        Nick Kossifidis <mick@....forth.gr>,
        Sebastien Boeuf <seb@...osinc.com>, iommu@...ts.linux.dev,
        linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux@...osinc.com
Subject: Re: [PATCH 05/11] RISC-V: drivers/iommu/riscv: Add sysfs interface

On 2023/7/20 3:33, Tomasz Jeznach wrote:
> +#define sysfs_dev_to_iommu(dev) \
> +	container_of(dev_get_drvdata(dev), struct riscv_iommu_device, iommu)
> +
> +static ssize_t address_show(struct device *dev,
> +			    struct device_attribute *attr, char *buf)
> +{
> +	struct riscv_iommu_device *iommu = sysfs_dev_to_iommu(dev);
> +	return sprintf(buf, "%llx\n", iommu->reg_phys);

Use sysfs_emit() please.

> +}
> +
> +static DEVICE_ATTR_RO(address);
> +
> +#define ATTR_RD_REG32(name, offset)					\
> +	ssize_t reg_ ## name ## _show(struct device *dev,		\
> +			struct device_attribute *attr, char *buf)	\
> +{									\
> +	struct riscv_iommu_device *iommu = sysfs_dev_to_iommu(dev);	\
> +	return sprintf(buf, "0x%x\n",					\
> +			riscv_iommu_readl(iommu, offset));		\
> +}
> +
> +#define ATTR_RD_REG64(name, offset)					\
> +	ssize_t reg_ ## name ## _show(struct device *dev,		\
> +			struct device_attribute *attr, char *buf)	\
> +{									\
> +	struct riscv_iommu_device *iommu = sysfs_dev_to_iommu(dev);	\
> +	return sprintf(buf, "0x%llx\n",					\
> +			riscv_iommu_readq(iommu, offset));		\
> +}
> +
> +#define ATTR_WR_REG32(name, offset)					\
> +	ssize_t reg_ ## name ## _store(struct device *dev,		\
> +			struct device_attribute *attr,			\
> +			const char *buf, size_t len)			\
> +{									\
> +	struct riscv_iommu_device *iommu = sysfs_dev_to_iommu(dev);	\
> +	unsigned long val;						\
> +	int ret;							\
> +	ret = kstrtoul(buf, 0, &val);					\
> +	if (ret)							\
> +		return ret;						\
> +	riscv_iommu_writel(iommu, offset, val);				\
> +	return len;							\
> +}
> +
> +#define ATTR_WR_REG64(name, offset)					\
> +	ssize_t reg_ ## name ## _store(struct device *dev,		\
> +			struct device_attribute *attr,			\
> +			const char *buf, size_t len)			\
> +{									\
> +	struct riscv_iommu_device *iommu = sysfs_dev_to_iommu(dev);	\
> +	unsigned long long val;						\
> +	int ret;							\
> +	ret = kstrtoull(buf, 0, &val);					\
> +	if (ret)							\
> +		return ret;						\
> +	riscv_iommu_writeq(iommu, offset, val);				\
> +	return len;							\
> +}

So this allows users to change the registers through sysfs? How does
it synchronize with the iommu driver?

Best regards,
baolu