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Message-ID: <431fa748-5b4c-061c-a5b1-331b504e5475@quicinc.com>
Date: Mon, 24 Jul 2023 21:41:58 +0530
From: Mukesh Ojha <quic_mojha@...cinc.com>
To: Komal Bajaj <quic_kbajaj@...cinc.com>, <agross@...nel.org>,
<andersson@...nel.org>, <konrad.dybcio@...aro.org>,
<robh+dt@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>,
<conor+dt@...nel.org>, <srinivas.kandagatla@...aro.org>
CC: <linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v5 2/6] soc: qcom: llcc: Refactor llcc driver to support
multiple configuration
On 7/24/2023 5:58 PM, Mukesh Ojha wrote:
>
>
> On 7/24/2023 2:11 PM, Komal Bajaj wrote:
>> Refactor driver to support multiple configuration for llcc on a target.
>>
>> Signed-off-by: Komal Bajaj <quic_kbajaj@...cinc.com>
>> ---
>> drivers/soc/qcom/llcc-qcom.c | 264 +++++++++++++++++++++++------------
>> 1 file changed, 178 insertions(+), 86 deletions(-)
>>
>> diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c
>> index 67c19ed2219a..321f8d2079f7 100644
>> --- a/drivers/soc/qcom/llcc-qcom.c
>> +++ b/drivers/soc/qcom/llcc-qcom.c
>> @@ -127,6 +127,12 @@ struct qcom_llcc_config {
>> bool no_edac;
>> };
>> +struct qcom_sct_config
>
> const ?
Please ignore this comment, it looks like, I wrote something and forgot
to remove..
-Mukesh
> > + const struct qcom_llcc_config *llcc_config;
>> + int num_cfgs;
>> +};
>> +
>> +
>> enum llcc_reg_offset {
>> LLCC_COMMON_HW_INFO,
>> LLCC_COMMON_STATUS0,
>> @@ -423,101 +429,185 @@ static const u32 llcc_v2_1_reg_offset[] = {
>> [LLCC_COMMON_STATUS0] = 0x0003400c,
>> };
>> -static const struct qcom_llcc_config sc7180_cfg = {
>> - .sct_data = sc7180_data,
>> - .size = ARRAY_SIZE(sc7180_data),
>> - .need_llcc_cfg = true,
>> - .reg_offset = llcc_v1_reg_offset,
>> - .edac_reg_offset = &llcc_v1_edac_reg_offset,
>> +static const struct qcom_llcc_config sc7180_cfg[] = {
>> + {
>> + .sct_data = sc7180_data,
>> + .size = ARRAY_SIZE(sc7180_data),
>> + .need_llcc_cfg = true,
>> + .reg_offset = llcc_v1_reg_offset,
>> + .edac_reg_offset = &llcc_v1_edac_reg_offset,
>> + },
>> +};
>> +
>> +static const struct qcom_llcc_config sc7280_cfg[] = {
>> + {
>> + .sct_data = sc7280_data,
>> + .size = ARRAY_SIZE(sc7280_data),
>> + .need_llcc_cfg = true,
>> + .reg_offset = llcc_v1_reg_offset,
>> + .edac_reg_offset = &llcc_v1_edac_reg_offset,
>> + },
>> +};
>> +
>> +static const struct qcom_llcc_config sc8180x_cfg[] = {
>> + {
>> + .sct_data = sc8180x_data,
>> + .size = ARRAY_SIZE(sc8180x_data),
>> + .need_llcc_cfg = true,
>> + .reg_offset = llcc_v1_reg_offset,
>> + .edac_reg_offset = &llcc_v1_edac_reg_offset,
>> + },
>> +};
>> +
>> +static const struct qcom_llcc_config sc8280xp_cfg[] = {
>> + {
>> + .sct_data = sc8280xp_data,
>> + .size = ARRAY_SIZE(sc8280xp_data),
>> + .need_llcc_cfg = true,
>> + .reg_offset = llcc_v1_reg_offset,
>> + .edac_reg_offset = &llcc_v1_edac_reg_offset,
>> + },
>> +};
>> +
>> +static const struct qcom_llcc_config sdm845_cfg[] = {
>> + {
>> + .sct_data = sdm845_data,
>> + .size = ARRAY_SIZE(sdm845_data),
>> + .need_llcc_cfg = false,
>> + .reg_offset = llcc_v1_reg_offset,
>> + .edac_reg_offset = &llcc_v1_edac_reg_offset,
>> + .no_edac = true,
>> + },
>> +};
>> +
>> +static const struct qcom_llcc_config sm6350_cfg[] = {
>> + {
>> + .sct_data = sm6350_data,
>> + .size = ARRAY_SIZE(sm6350_data),
>> + .need_llcc_cfg = true,
>> + .reg_offset = llcc_v1_reg_offset,
>> + .edac_reg_offset = &llcc_v1_edac_reg_offset,
>> + },
>> +};
>> +
>> +static const struct qcom_llcc_config sm7150_cfg[] = {
>> + {
>> + .sct_data = sm7150_data,
>> + .size = ARRAY_SIZE(sm7150_data),
>> + .need_llcc_cfg = true,
>> + .reg_offset = llcc_v1_reg_offset,
>> + .edac_reg_offset = &llcc_v1_edac_reg_offset,
>> + },
>> +};
>> +
>> +static const struct qcom_llcc_config sm8150_cfg[] = {
>> + {
>> + .sct_data = sm8150_data,
>> + .size = ARRAY_SIZE(sm8150_data),
>> + .need_llcc_cfg = true,
>> + .reg_offset = llcc_v1_reg_offset,
>> + .edac_reg_offset = &llcc_v1_edac_reg_offset,
>> + },
>> +};
>> +
>> +static const struct qcom_llcc_config sm8250_cfg[] = {
>> + {
>> + .sct_data = sm8250_data,
>> + .size = ARRAY_SIZE(sm8250_data),
>> + .need_llcc_cfg = true,
>> + .reg_offset = llcc_v1_reg_offset,
>> + .edac_reg_offset = &llcc_v1_edac_reg_offset,
>> + },
>> +};
>> +
>> +static const struct qcom_llcc_config sm8350_cfg[] = {
>> + {
>> + .sct_data = sm8350_data,
>> + .size = ARRAY_SIZE(sm8350_data),
>> + .need_llcc_cfg = true,
>> + .reg_offset = llcc_v1_reg_offset,
>> + .edac_reg_offset = &llcc_v1_edac_reg_offset,
>> + },
>> +};
>> +
>> +static const struct qcom_llcc_config sm8450_cfg[] = {
>> + {
>> + .sct_data = sm8450_data,
>> + .size = ARRAY_SIZE(sm8450_data),
>> + .need_llcc_cfg = true,
>> + .reg_offset = llcc_v2_1_reg_offset,
>> + .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
>> + },
>> +};
>> +
>> +static const struct qcom_llcc_config sm8550_cfg[] = {
>> + {
>> + .sct_data = sm8550_data,
>> + .size = ARRAY_SIZE(sm8550_data),
>> + .need_llcc_cfg = true,
>> + .reg_offset = llcc_v2_1_reg_offset,
>> + .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
>> + },
>> +};
>> +
>> +static const struct qcom_sct_config sc7180_cfgs = {
>> + .llcc_config = sc7180_cfg,
>> + .num_cfgs = 1,
>> };
>> -static const struct qcom_llcc_config sc7280_cfg = {
>> - .sct_data = sc7280_data,
>> - .size = ARRAY_SIZE(sc7280_data),
>> - .need_llcc_cfg = true,
>> - .reg_offset = llcc_v1_reg_offset,
>> - .edac_reg_offset = &llcc_v1_edac_reg_offset,
>> +static const struct qcom_sct_config sc7280_cfgs = {
>> + .llcc_config = sc7280_cfg,
>> + .num_cfgs = 1,
>> };
>> -static const struct qcom_llcc_config sc8180x_cfg = {
>> - .sct_data = sc8180x_data,
>> - .size = ARRAY_SIZE(sc8180x_data),
>> - .need_llcc_cfg = true,
>> - .reg_offset = llcc_v1_reg_offset,
>> - .edac_reg_offset = &llcc_v1_edac_reg_offset,
>> +static const struct qcom_sct_config sc8180x_cfgs = {
>> + .llcc_config = sc8180x_cfg,
>> + .num_cfgs = 1,
>> };
>> -static const struct qcom_llcc_config sc8280xp_cfg = {
>> - .sct_data = sc8280xp_data,
>> - .size = ARRAY_SIZE(sc8280xp_data),
>> - .need_llcc_cfg = true,
>> - .reg_offset = llcc_v1_reg_offset,
>> - .edac_reg_offset = &llcc_v1_edac_reg_offset,
>> +static const struct qcom_sct_config sc8280xp_cfgs = {
>> + .llcc_config = sc8280xp_cfg,
>> + .num_cfgs = 1,
>> };
>> -static const struct qcom_llcc_config sdm845_cfg = {
>> - .sct_data = sdm845_data,
>> - .size = ARRAY_SIZE(sdm845_data),
>> - .need_llcc_cfg = false,
>> - .reg_offset = llcc_v1_reg_offset,
>> - .edac_reg_offset = &llcc_v1_edac_reg_offset,
>> - .no_edac = true,
>> +static const struct qcom_sct_config sdm845_cfgs = {
>> + .llcc_config = sdm845_cfg,
>> + .num_cfgs = 1,
>> };
>> -static const struct qcom_llcc_config sm6350_cfg = {
>> - .sct_data = sm6350_data,
>> - .size = ARRAY_SIZE(sm6350_data),
>> - .need_llcc_cfg = true,
>> - .reg_offset = llcc_v1_reg_offset,
>> - .edac_reg_offset = &llcc_v1_edac_reg_offset,
>> +static const struct qcom_sct_config sm6350_cfgs = {
>> + .llcc_config = sm6350_cfg,
>> + .num_cfgs = 1,
>> };
>> -static const struct qcom_llcc_config sm7150_cfg = {
>> - .sct_data = sm7150_data,
>> - .size = ARRAY_SIZE(sm7150_data),
>> - .need_llcc_cfg = true,
>> - .reg_offset = llcc_v1_reg_offset,
>> - .edac_reg_offset = &llcc_v1_edac_reg_offset,
>> +static const struct qcom_sct_config sm7150_cfgs = {
>> + .llcc_config = sm7150_cfg,
>> + .num_cfgs = 1,
>> };
>> -static const struct qcom_llcc_config sm8150_cfg = {
>> - .sct_data = sm8150_data,
>> - .size = ARRAY_SIZE(sm8150_data),
>> - .need_llcc_cfg = true,
>> - .reg_offset = llcc_v1_reg_offset,
>> - .edac_reg_offset = &llcc_v1_edac_reg_offset,
>> +static const struct qcom_sct_config sm8150_cfgs = {
>> + .llcc_config = sm8150_cfg,
>> + .num_cfgs = 1,
>> };
>> -static const struct qcom_llcc_config sm8250_cfg = {
>> - .sct_data = sm8250_data,
>> - .size = ARRAY_SIZE(sm8250_data),
>> - .need_llcc_cfg = true,
>> - .reg_offset = llcc_v1_reg_offset,
>> - .edac_reg_offset = &llcc_v1_edac_reg_offset,
>> +static const struct qcom_sct_config sm8250_cfgs = {
>> + .llcc_config = sm8250_cfg,
>> + .num_cfgs = 1,
>> };
>> -static const struct qcom_llcc_config sm8350_cfg = {
>> - .sct_data = sm8350_data,
>> - .size = ARRAY_SIZE(sm8350_data),
>> - .need_llcc_cfg = true,
>> - .reg_offset = llcc_v1_reg_offset,
>> - .edac_reg_offset = &llcc_v1_edac_reg_offset,
>> +static const struct qcom_sct_config sm8350_cfgs = {
>> + .llcc_config = sm8350_cfg,
>> + .num_cfgs = 1,
>> };
>> -static const struct qcom_llcc_config sm8450_cfg = {
>> - .sct_data = sm8450_data,
>> - .size = ARRAY_SIZE(sm8450_data),
>> - .need_llcc_cfg = true,
>> - .reg_offset = llcc_v2_1_reg_offset,
>> - .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
>> +static const struct qcom_sct_config sm8450_cfgs = {
>> + .llcc_config = sm8450_cfg,
>> + .num_cfgs = 1,
>> };
>> -static const struct qcom_llcc_config sm8550_cfg = {
>> - .sct_data = sm8550_data,
>> - .size = ARRAY_SIZE(sm8550_data),
>> - .need_llcc_cfg = true,
>> - .reg_offset = llcc_v2_1_reg_offset,
>> - .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
>> +static const struct qcom_sct_config sm8550_cfgs = {
>> + .llcc_config = sm8550_cfg,
>> + .num_cfgs = 1,
>
> num prefix itself take care of singular/plural, num_config would do
> good.
>
>
>> };
>> static struct llcc_drv_data *drv_data = (void *) -EPROBE_DEFER;
>> @@ -939,6 +1029,7 @@ static int qcom_llcc_probe(struct platform_device
>> *pdev)
>> struct device *dev = &pdev->dev;
>> int ret, i;
>> struct platform_device *llcc_edac;
>> + const struct qcom_sct_config *cfgs;
>> const struct qcom_llcc_config *cfg;
>> const struct llcc_slice_config *llcc_cfg;
>> u32 sz;
>> @@ -958,7 +1049,8 @@ static int qcom_llcc_probe(struct platform_device
>> *pdev)
>> goto err;
>> }
>> - cfg = of_device_get_match_data(&pdev->dev);
>> + cfgs = of_device_get_match_data(&pdev->dev);
>> + cfg = &cfgs->llcc_config[0];
>
> Hardcoding without check ?
>
> #define DEFAULT_NUM_CFG 1
>
> if (cfgs->num_cfgs != DEFAULT_NUM_CFG)
> ret = -EINVAL;
> goto err;
>
> cfg = &cfgs->llcc_config[DEFAULT_NUM_CFG - 1];
>
> I would let others comment as well..
>
>
> -Mukesh
>
>> ret = regmap_read(regmap, cfg->reg_offset[LLCC_COMMON_STATUS0],
>> &num_banks);
>> if (ret)
>> @@ -1051,18 +1143,18 @@ static int qcom_llcc_probe(struct
>> platform_device *pdev)
>> }
>> static const struct of_device_id qcom_llcc_of_match[] = {
>> - { .compatible = "qcom,sc7180-llcc", .data = &sc7180_cfg },
>> - { .compatible = "qcom,sc7280-llcc", .data = &sc7280_cfg },
>> - { .compatible = "qcom,sc8180x-llcc", .data = &sc8180x_cfg },
>> - { .compatible = "qcom,sc8280xp-llcc", .data = &sc8280xp_cfg },
>> - { .compatible = "qcom,sdm845-llcc", .data = &sdm845_cfg },
>> - { .compatible = "qcom,sm6350-llcc", .data = &sm6350_cfg },
>> - { .compatible = "qcom,sm7150-llcc", .data = &sm7150_cfg },
>> - { .compatible = "qcom,sm8150-llcc", .data = &sm8150_cfg },
>> - { .compatible = "qcom,sm8250-llcc", .data = &sm8250_cfg },
>> - { .compatible = "qcom,sm8350-llcc", .data = &sm8350_cfg },
>> - { .compatible = "qcom,sm8450-llcc", .data = &sm8450_cfg },
>> - { .compatible = "qcom,sm8550-llcc", .data = &sm8550_cfg },
>> + { .compatible = "qcom,sc7180-llcc", .data = &sc7180_cfgs },
>> + { .compatible = "qcom,sc7280-llcc", .data = &sc7280_cfgs },
>> + { .compatible = "qcom,sc8180x-llcc", .data = &sc8180x_cfgs },
>> + { .compatible = "qcom,sc8280xp-llcc", .data = &sc8280xp_cfgs },
>> + { .compatible = "qcom,sdm845-llcc", .data = &sdm845_cfgs },
>> + { .compatible = "qcom,sm6350-llcc", .data = &sm6350_cfgs },
>> + { .compatible = "qcom,sm7150-llcc", .data = &sm7150_cfgs },
>> + { .compatible = "qcom,sm8150-llcc", .data = &sm8150_cfgs },
>> + { .compatible = "qcom,sm8250-llcc", .data = &sm8250_cfgs },
>> + { .compatible = "qcom,sm8350-llcc", .data = &sm8350_cfgs },
>> + { .compatible = "qcom,sm8450-llcc", .data = &sm8450_cfgs },
>> + { .compatible = "qcom,sm8550-llcc", .data = &sm8550_cfgs },
>> { }
>> };
>> MODULE_DEVICE_TABLE(of, qcom_llcc_of_match);
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