linux-kernel - Re: [PATCH] clk: qcom: gcc-sm8250: Fix gcc_sdcc2_apps_clk

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Message-ID: <c1726d77-ef6e-e224-3c3e-2f982fd29b79@linaro.org>
Date:   Fri, 28 Jul 2023 21:23:51 +0200
From:   Konrad Dybcio <konrad.dybcio@...aro.org>
To:     Patrick Whewell <patrick.whewell@...htlineapplications.com>
Cc:     Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
        William Gray <william.gray@...aro.org>,
        Andy Gross <agross@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Taniya Das <tdas@...eaurora.org>,
        Bryan O'Donoghue <bryan.odonoghue@...aro.org>,
        Venkata Narendra Kumar Gutta <vnkgutta@...eaurora.org>,
        Vinod Koul <vkoul@...nel.org>, linux-arm-msm@...r.kernel.org,
        linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] clk: qcom: gcc-sm8250: Fix gcc_sdcc2_apps_clk_src

On 28.07.2023 21:14, Patrick Whewell wrote:
> Set .flags = CLK_OPS_PARENT_ENABLE to fix "gcc_sdcc2_apps_clk_src: rcg
> didn't update its configuration" error.
> 
> Signed-off-by: Patrick Whewell <patrick.whewell@...htlineapplications.com>
> Fixes: 3e5770921a88 ("clk: qcom: gcc: Add global clock controller driver for SM8250")
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@...aro.org>

You could also mention that the error is caused by GPLL9 (the one
providing the highest frequency in the freq table) not being on
by default.

And ultra nit: your s-o-b should go last

Konrad
>  drivers/clk/qcom/gcc-sm8250.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/clk/qcom/gcc-sm8250.c b/drivers/clk/qcom/gcc-sm8250.c
> index b6cf4bc88d4d..d3c75bb55946 100644
> --- a/drivers/clk/qcom/gcc-sm8250.c
> +++ b/drivers/clk/qcom/gcc-sm8250.c
> @@ -721,6 +721,7 @@ static struct clk_rcg2 gcc_sdcc2_apps_clk_src = {
>  		.name = "gcc_sdcc2_apps_clk_src",
>  		.parent_data = gcc_parent_data_4,
>  		.num_parents = ARRAY_SIZE(gcc_parent_data_4),
> +		.flags = CLK_OPS_PARENT_ENABLE,
>  		.ops = &clk_rcg2_floor_ops,
>  	},
>  };