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Message-ID: <20230729-b5ec43a48d67caf13025fafe@orel>
Date: Sat, 29 Jul 2023 09:38:19 +0200
From: Andrew Jones <ajones@...tanamicro.com>
To: Ian Rogers <irogers@...gle.com>
Cc: Alexandre Ghiti <alexghiti@...osinc.com>,
Jonathan Corbet <corbet@....net>,
Peter Zijlstra <peterz@...radead.org>,
Ingo Molnar <mingo@...hat.com>,
Arnaldo Carvalho de Melo <acme@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Jiri Olsa <jolsa@...nel.org>,
Namhyung Kim <namhyung@...nel.org>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
Atish Patra <atishp@...shpatra.org>,
Anup Patel <anup@...infault.org>,
Will Deacon <will@...nel.org>, Rob Herring <robh@...nel.org>,
Rémi Denis-Courmont <remi@...lab.net>,
linux-doc@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-perf-users@...r.kernel.org, linux-riscv@...ts.infradead.org,
linux-arm-kernel@...ts.infradead.org,
Atish Patra <atishp@...osinc.com>
Subject: Re: [PATCH v4 10/10] perf: tests: Adapt mmap-basic.c for riscv
On Fri, Jul 28, 2023 at 10:54:02AM -0700, Ian Rogers wrote:
> On Thu, Jul 27, 2023 at 7:30 AM Alexandre Ghiti <alexghiti@...osinc.com> wrote:
> >
> > riscv now supports mmaping hardware counters to userspace so adapt the test
> > to run on this architecture.
> >
> > Signed-off-by: Alexandre Ghiti <alexghiti@...osinc.com>
> > Reviewed-by: Andrew Jones <ajones@...tanamicro.com>
> > Reviewed-by: Atish Patra <atishp@...osinc.com>
> > ---
> > tools/perf/tests/mmap-basic.c | 4 ++--
> > 1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/tools/perf/tests/mmap-basic.c b/tools/perf/tests/mmap-basic.c
> > index e68ca6229756..f5075ca774f8 100644
> > --- a/tools/perf/tests/mmap-basic.c
> > +++ b/tools/perf/tests/mmap-basic.c
> > @@ -284,7 +284,7 @@ static struct test_case tests__basic_mmap[] = {
> > "permissions"),
> > TEST_CASE_REASON("User space counter reading of instructions",
> > mmap_user_read_instr,
> > -#if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__)
> > +#if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__) || __riscv_xlen == 64
>
> Same comment relating to the guard, why not defined(__riscv) ?
__riscv_xlen will always be defined for all riscv targets, so also
checking __riscv isn't necessary when a specific bit width also needs
to be checked. __riscv is useful for checks that don't need to be
concerned with the bit width. Grepping, I see instances of both
"defined(__riscv) && __riscv_xlen ==" and just "__riscv_xlen ==".
IMHO, the former should be reduced to the latter, rather than creating
more instances of them.
Thanks,
drew
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