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Message-ID: <20230801-casket-sterling-db0e49f154cf-mkl@pengutronix.de>
Date: Tue, 1 Aug 2023 11:01:04 +0200
From: Marc Kleine-Budde <mkl@...gutronix.de>
To: Shenwei Wang <shenwei.wang@....com>
Cc: Russell King <linux@...linux.org.uk>,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Neil Armstrong <neil.armstrong@...aro.org>,
Kevin Hilman <khilman@...libre.com>,
Vinod Koul <vkoul@...nel.org>, Chen-Yu Tsai <wens@...e.org>,
Jernej Skrabec <jernej.skrabec@...il.com>,
Samuel Holland <samuel@...lland.org>,
Jose Abreu <joabreu@...opsys.com>, imx@...ts.linux.dev,
Simon Horman <simon.horman@...igine.com>,
Frank Li <frank.li@....com>,
Alexandre Torgue <alexandre.torgue@...s.st.com>,
Giuseppe Cavallaro <peppe.cavallaro@...com>,
Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@...hiba.co.jp>,
Fabio Estevam <festevam@...il.com>,
linux-stm32@...md-mailman.stormreply.com,
Jerome Brunet <jbrunet@...libre.com>,
Bartosz Golaszewski <bartosz.golaszewski@...aro.org>,
Wong Vee Khee <veekhee@...le.com>,
NXP Linux Team <linux-imx@....com>,
Andrew Halaney <ahalaney@...hat.com>,
Bhupesh Sharma <bhupesh.sharma@...aro.org>,
Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
Revanth Kumar Uppala <ruppala@...dia.com>,
Jochen Henneberg <jh@...neberg-systemdesign.com>,
linux-amlogic@...ts.infradead.org,
linux-arm-kernel@...ts.infradead.org, netdev@...r.kernel.org,
linux-kernel@...r.kernel.org,
Pengutronix Kernel Team <kernel@...gutronix.de>
Subject: Re: [PATCH v3 net 2/2] net: stmmac: dwmac-imx: pause the TXC clock
in fixed-link
On 31.07.2023 11:19:29, Shenwei Wang wrote:
> When using a fixed-link setup, certain devices like the SJA1105 require a
> small pause in the TXC clock line to enable their internal tunable
> delay line (TDL).
>
> To satisfy this requirement, this patch temporarily disables the TX clock,
> and restarts it after a required period. This provides the required
> silent interval on the clock line for SJA1105 to complete the frequency
> transition and enable the internal TDLs.
>
> So far we have only enabled this feature on the i.MX93 platform.
>
> Signed-off-by: Shenwei Wang <shenwei.wang@....com>
> Reviewed-by: Frank Li <frank.li@....com>
> ---
> .../net/ethernet/stmicro/stmmac/dwmac-imx.c | 42 +++++++++++++++++++
> 1 file changed, 42 insertions(+)
>
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c
> index 53ee5a42c071..2e4173d099f3 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c
> @@ -32,6 +32,7 @@
> #define GPR_ENET_QOS_RGMII_EN (0x1 << 21)
>
> #define MX93_GPR_ENET_QOS_INTF_MODE_MASK GENMASK(3, 0)
> +#define MX93_GPR_ENET_QOS_INTF_MASK GENMASK(3, 1)
> #define MX93_GPR_ENET_QOS_INTF_SEL_MII (0x0 << 1)
> #define MX93_GPR_ENET_QOS_INTF_SEL_RMII (0x4 << 1)
> #define MX93_GPR_ENET_QOS_INTF_SEL_RGMII (0x1 << 1)
> @@ -40,6 +41,7 @@
> #define DMA_BUS_MODE 0x00001000
> #define DMA_BUS_MODE_SFT_RESET (0x1 << 0)
> #define RMII_RESET_SPEED (0x3 << 14)
> +#define CTRL_SPEED_MASK GENMASK(15, 14)
>
> struct imx_dwmac_ops {
> u32 addr_width;
> @@ -56,6 +58,7 @@ struct imx_priv_data {
> struct regmap *intf_regmap;
> u32 intf_reg_off;
> bool rmii_refclk_ext;
> + void __iomem *base_addr;
>
> const struct imx_dwmac_ops *ops;
> struct plat_stmmacenet_data *plat_dat;
> @@ -212,6 +215,42 @@ static void imx_dwmac_fix_speed(void *priv, uint speed, uint mode)
> dev_err(dwmac->dev, "failed to set tx rate %lu\n", rate);
> }
>
> +static void imx_dwmac_fix_speed_mx93(void *priv, uint speed, uint mode)
> +{
> + struct imx_priv_data *dwmac = priv;
> + int ctrl, old_ctrl, iface;
regmap_read() wants a pointer to an "unsigned int".
> +
> + imx_dwmac_fix_speed(priv, speed, mode);
> +
> + if (!dwmac || mode != MLO_AN_FIXED)
> + return;
> +
> + if (regmap_read(dwmac->intf_regmap, dwmac->intf_reg_off, &iface))
> + return;
> +
> + iface &= MX93_GPR_ENET_QOS_INTF_MASK;
> + if (iface != MX93_GPR_ENET_QOS_INTF_SEL_RGMII)
> + return;
> +
> + old_ctrl = readl(dwmac->base_addr + MAC_CTRL_REG);
> + ctrl = old_ctrl & ~CTRL_SPEED_MASK;
> + regmap_update_bits(dwmac->intf_regmap, dwmac->intf_reg_off,
> + MX93_GPR_ENET_QOS_INTF_MODE_MASK, 0);
> + writel(ctrl, dwmac->base_addr + MAC_CTRL_REG);
> +
> + /* Ensure the settings for CTRL are applied and avoid CPU/Compiler
> + * reordering.
> + */
> + wmb();
> +
> + usleep_range(10, 20);
> + iface |= MX93_GPR_ENET_QOS_CLK_GEN_EN;
> + regmap_update_bits(dwmac->intf_regmap, dwmac->intf_reg_off,
> + MX93_GPR_ENET_QOS_INTF_MODE_MASK, iface);
> +
> + writel(old_ctrl, dwmac->base_addr + MAC_CTRL_REG);
> +}
Marc
--
Pengutronix e.K. | Marc Kleine-Budde |
Embedded Linux | https://www.pengutronix.de |
Vertretung Nürnberg | Phone: +49-5121-206917-129 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-9 |
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