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Message-ID: <DM6PR12MB261918C00FCDF3E4BBBC1C57E40AA@DM6PR12MB2619.namprd12.prod.outlook.com>
Date: Tue, 1 Aug 2023 09:25:18 +0000
From: "Quan, Evan" <Evan.Quan@....com>
To: Ran Sun <sunran001@...suo.com>,
"Deucher, Alexander" <Alexander.Deucher@....com>,
"airlied@...il.com" <airlied@...il.com>,
"daniel@...ll.ch" <daniel@...ll.ch>
CC: "dri-devel@...ts.freedesktop.org" <dri-devel@...ts.freedesktop.org>,
"amd-gfx@...ts.freedesktop.org" <amd-gfx@...ts.freedesktop.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH] drm/amd/pm: Clean up errors in vega20_hwmgr.h
[AMD Official Use Only - General]
Reviewed-by: Evan Quan <evan.quan@....com>
> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces@...ts.freedesktop.org> On Behalf Of Ran
> Sun
> Sent: Tuesday, August 1, 2023 10:39 AM
> To: Deucher, Alexander <Alexander.Deucher@....com>; airlied@...il.com;
> daniel@...ll.ch
> Cc: Ran Sun <sunran001@...suo.com>; dri-devel@...ts.freedesktop.org;
> amd-gfx@...ts.freedesktop.org; linux-kernel@...r.kernel.org
> Subject: [PATCH] drm/amd/pm: Clean up errors in vega20_hwmgr.h
>
> Fix the following errors reported by checkpatch:
>
> ERROR: open brace '{' following enum go on the same line
>
> Signed-off-by: Ran Sun <sunran001@...suo.com>
> ---
> drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.h | 6 ++----
> 1 file changed, 2 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.h
> b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.h
> index 075c0094da9c..1ba9b5fe2a5d 100644
> --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.h
> +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.h
> @@ -385,8 +385,7 @@ struct vega20_odn_data {
> struct vega20_odn_temp_table odn_temp_table;
> };
>
> -enum OD8_FEATURE_ID
> -{
> +enum OD8_FEATURE_ID {
> OD8_GFXCLK_LIMITS = 1 << 0,
> OD8_GFXCLK_CURVE = 1 << 1,
> OD8_UCLK_MAX = 1 << 2,
> @@ -399,8 +398,7 @@ enum OD8_FEATURE_ID
> OD8_FAN_ZERO_RPM_CONTROL = 1 << 9
> };
>
> -enum OD8_SETTING_ID
> -{
> +enum OD8_SETTING_ID {
> OD8_SETTING_GFXCLK_FMIN = 0,
> OD8_SETTING_GFXCLK_FMAX,
> OD8_SETTING_GFXCLK_FREQ1,
> --
> 2.17.1
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