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Date:   Wed, 02 Aug 2023 21:46:00 +0200
From:   Thomas Gleixner <tglx@...utronix.de>
To:     "Michael Kelley (LINUX)" <mikelley@...rosoft.com>,
        LKML <linux-kernel@...r.kernel.org>
Cc:     "x86@...nel.org" <x86@...nel.org>,
        Tom Lendacky <thomas.lendacky@....com>,
        Andrew Cooper <andrew.cooper3@...rix.com>,
        Arjan van de Ven <arjan@...ux.intel.com>,
        Huang Rui <ray.huang@....com>, Juergen Gross <jgross@...e.com>,
        Dimitri Sivanich <dimitri.sivanich@....com>,
        Wei Liu <wei.liu@...nel.org>
Subject: RE: [patch V3 30/40] x86/cpu: Provide an AMD/HYGON specific
 topology parser

On Wed, Aug 02 2023 at 19:28, Michael Kelley (LINUX) wrote:
> From: Thomas Gleixner <tglx@...utronix.de> Sent: Wednesday, August 2, 2023 3:22 AM
>> +	/*
>> +	 * If leaf 0xb is available, then SMT shift is set already. If not
>> +	 * take it from ecx.threads_per_cu and use topo_update_dom() -
>> +	 * topology_set_dom() would propagate and overwrite the already
>> +	 * propagated CORE level.
>> +	 */
>> +	if (!has_0xb) {
>> +		topology_update_dom(tscan, TOPO_SMT_DOMAIN, get_count_order(leaf.threads_per_cu),
>> +				    leaf.threads_per_cu + 1);
>
> Isn't the +1 also needed on the argument to get_count_order()?
> I haven't actually run the config, but if hyper-threading is disabled,
> presumably threads_per_cu is 0, and get_count_order returns -1.

Bah. I'm sure that I wanted to do that. No idea how I forgot about it
again.

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