linux-kernel - [RESEND PATCH v2] clk: qcom: gcc-sm8250: Fix gcc_sdcc2_apps_clk

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Message-Id: <20230802210359.408-1-patrick.whewell@sightlineapplications.com>
Date:   Wed,  2 Aug 2023 14:04:00 -0700
From:   Patrick Whewell <patrick.whewell@...htlineapplications.com>
To:     Andy Gross <agross@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konrad.dybcio@...aro.org>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        "Bryan O'Donoghue" <bryan.odonoghue@...aro.org>,
        Vinod Koul <vkoul@...nel.org>,
        Taniya Das <tdas@...eaurora.org>,
        Venkata Narendra Kumar Gutta <vnkgutta@...eaurora.org>,
        linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
        linux-kernel@...r.kernel.org
Cc:     Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
        William Gray <william.gray@...aro.org>,
        Patrick Whewell <patrick.whewell@...htlineapplications.com>
Subject: [RESEND PATCH v2] clk: qcom: gcc-sm8250: Fix gcc_sdcc2_apps_clk_src

GPLL9 is not on by default, which causes a "gcc_sdcc2_apps_clk_src: rcg
didn't update its configuration" error when booting. Set .flags =
CLK_OPS_PARENT_ENABLE to fix the error.

Fixes: 3e5770921a88 ("clk: qcom: gcc: Add global clock controller driver for SM8250")
Reviewed-by: Konrad Dybcio <konrad.dybcio@...aro.org>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@...aro.org>
Signed-off-by: Patrick Whewell <patrick.whewell@...htlineapplications.com>
---
Changes in v2:
    - Updated commit messaage to mention GPLL9 not being on by default
      being the cause of error
    - Moved Signed-off-by line to the bottom.

 drivers/clk/qcom/gcc-sm8250.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/clk/qcom/gcc-sm8250.c b/drivers/clk/qcom/gcc-sm8250.c
index b6cf4bc88d4d..d3c75bb55946 100644
--- a/drivers/clk/qcom/gcc-sm8250.c
+++ b/drivers/clk/qcom/gcc-sm8250.c
@@ -721,6 +721,7 @@ static struct clk_rcg2 gcc_sdcc2_apps_clk_src = {
 		.name = "gcc_sdcc2_apps_clk_src",
 		.parent_data = gcc_parent_data_4,
 		.num_parents = ARRAY_SIZE(gcc_parent_data_4),
+		.flags = CLK_OPS_PARENT_ENABLE,
 		.ops = &clk_rcg2_floor_ops,
 	},
 };
-- 
2.25.1