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Message-ID: <4efd1c627a934915b4e9b313879d83e9@ti.com>
Date:   Wed, 2 Aug 2023 04:04:15 +0000
From:   "Kumar, Udit" <u-kumar1@...com>
To:     Esteban Blanc <eblanc@...libre.com>, "Menon, Nishanth" <nm@...com>,
        "Raghavendra, Vignesh" <vigneshr@...com>,
        "kristo@...nel.org" <kristo@...nel.org>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "krzysztof.kozlowski+dt@...aro.org" 
        <krzysztof.kozlowski+dt@...aro.org>
CC:     "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "jneanne@...libre.com" <jneanne@...libre.com>,
        "aseketeli@...libre.com" <aseketeli@...libre.com>,
        "jpanis@...libre.com" <jpanis@...libre.com>,
        "Tonking, Reid" <reidt@...com>
Subject: RE: [PATCH v4 1/6] arm64: dts: ti: k3-j7200-som-p0: Add TP6594 family
 PMICs

Hi Esteban, 

>This patch adds support for TPS6594 PMIC family on wakup I2C0 bus.
>Theses devices provides regulators (bucks and LDOs), but also
>GPIOs, a RTC, a watchdog, an ESM (Error Signal Monitor)
>which monitors the SoC error output signal, and a PFSM
>(Pre-configurable Finite State Machine) which manages the
>operational modes of the PMIC.
>
>Signed-off-by: Esteban Blanc <eblanc@...libre.com>
>---
> arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi | 157 ++++++++++++++++++++
> 1 file changed, 157 insertions(+)
>
>diff --git a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
>b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
>index b37f4f88ece4..e45d97cc41a5 100644
>--- a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
>+++ b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
>@@ -127,6 +127,14 @@ J721E_WKUP_IOPAD(0x9c, PIN_INPUT_PULLUP, 0) /*
>(H21) WKUP_I2C0_SDA */
> 	};
> };
>
>+&wkup_pmx3 {
>+	pmic_irq_pins_default: pmic-irq-pins-default {
>+		pinctrl-single,pins = <
>+			J721E_WKUP_IOPAD(0x1c, PIN_INPUT, 7) /* (E18)
>WKUP_GPIO0_84 */

Could you use 0x01c format instead of 0x1c, 
and similar format in other patches in this series too.  

Rest LGTM 

>+		>;
>+	};
>+};
>+
[..]

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