linux-kernel - RE: [PATCH v4 2/6] arm64: dts: ti: k3-j721s2-som-p0: Add TP6594 family PMICs

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <e9f9ebf13ee640daabd54a730e286193@ti.com>
Date:   Thu, 3 Aug 2023 10:31:46 +0000
From:   "Kumar, Udit" <u-kumar1@...com>
To:     Esteban Blanc <eblanc@...libre.com>, "Menon, Nishanth" <nm@...com>,
        "Raghavendra, Vignesh" <vigneshr@...com>,
        "kristo@...nel.org" <kristo@...nel.org>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "krzysztof.kozlowski+dt@...aro.org" 
        <krzysztof.kozlowski+dt@...aro.org>
CC:     "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "jneanne@...libre.com" <jneanne@...libre.com>,
        "aseketeli@...libre.com" <aseketeli@...libre.com>,
        "jpanis@...libre.com" <jpanis@...libre.com>,
        "Achath, Vaishnav" <vaishnav.a@...com>
Subject: RE: [PATCH v4 2/6] arm64: dts: ti: k3-j721s2-som-p0: Add TP6594
 family PMICs

Hi Esteban

> [...]
>Signed-off-by: Esteban Blanc <eblanc@...libre.com>
>---
> arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi | 199 +++++++++++++++++++
> 1 file changed, 199 insertions(+)
>
>diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi
>b/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi
>index d57dd43da0ef..5348aafe3277 100644
>--- a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi
>+++ b/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi
>@@ -61,6 +61,15 @@ J721S2_WKUP_IOPAD(0x004, PIN_INPUT, 0) /* (E20)
>MCU_OSPI0_LBCLKO */
> 	};
> };
>
>+&wkup_pmx1 {
>+	pmic_irq_pins_default: pmic-irq-pins-default {
>+		pinctrl-single,pins = <
>+			/* (C21) MCU_OSPI1_CSn1.WKUP_GPIO0_39 */
>+			J721S2_WKUP_IOPAD(0x28, PIN_INPUT, 7)
>+		>;

I see, this pin is getting shared with OSPI-1 .
I think either OSPI or PMIC could be functional at one time ? 

>+	};
>+};
>+
>  [...]