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Message-Id: <20230805164052.669184-1-bigunclemax@gmail.com>
Date: Sat, 5 Aug 2023 19:40:52 +0300
From: Maksim Kiselev <bigunclemax@...il.com>
To: contact@...kia.org
Cc: aou@...s.berkeley.edu, conor+dt@...nel.org, davem@...emloft.net,
devicetree@...r.kernel.org, edumazet@...gle.com,
jernej.skrabec@...il.com, krzysztof.kozlowski+dt@...aro.org,
kuba@...nel.org, linux-arm-kernel@...ts.infradead.org,
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linux-riscv@...ts.infradead.org, linux-sunxi@...ts.linux.dev,
mkl@...gutronix.de, netdev@...r.kernel.org, pabeni@...hat.com,
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samuel@...lland.org, wens@...e.org, wg@...ndegger.com
Subject: Re: [PATCH v2 2/4] riscv: dts: allwinner: d1: Add CAN controller nodes
Hi John, Jernej
On Sat, Jul 22, 2023 at 08:15:51AM +1000, John Watts wrote:
> ...
> @@ -131,6 +131,18 @@ uart3_pb_pins: uart3-pb-pins {
> pins = "PB6", "PB7";
> function = "uart3";
> };
> +
> + /omit-if-no-ref/
> + can0_pins: can0-pins {
> + pins = "PB2", "PB3";
> + function = "can0";
> + };
> +
> + /omit-if-no-ref/
> + can1_pins: can1-pins {
> + pins = "PB4", "PB5";
> + function = "can1";
> + };
> ...
Should we also keep a pinctrl nodes itself in alphabetical order?
I mean placing a CAN nodes before `clk_pg11_pin` node?
Looks like the other nodes sorted in this way...
Cheers,
Maksim
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