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Message-ID: <ZM5-Ke-59o0R5AtY@titan>
Date:   Sun, 6 Aug 2023 02:51:53 +1000
From:   John Watts <contact@...kia.org>
To:     Maksim Kiselev <bigunclemax@...il.com>
Cc:     aou@...s.berkeley.edu, conor+dt@...nel.org, davem@...emloft.net,
        devicetree@...r.kernel.org, edumazet@...gle.com,
        jernej.skrabec@...il.com, krzysztof.kozlowski+dt@...aro.org,
        kuba@...nel.org, linux-arm-kernel@...ts.infradead.org,
        linux-can@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-riscv@...ts.infradead.org, linux-sunxi@...ts.linux.dev,
        mkl@...gutronix.de, netdev@...r.kernel.org, pabeni@...hat.com,
        palmer@...belt.com, paul.walmsley@...ive.com, robh+dt@...nel.org,
        samuel@...lland.org, wens@...e.org, wg@...ndegger.com
Subject: Re: [PATCH v2 2/4] riscv: dts: allwinner: d1: Add CAN controller
 nodes

On Sat, Aug 05, 2023 at 07:40:52PM +0300, Maksim Kiselev wrote:
> Hi John, Jernej
> Should we also keep a pinctrl nodes itself in alphabetical order?
> I mean placing a CAN nodes before `clk_pg11_pin` node?
> Looks like the other nodes sorted in this way...

Good catch. Now that you mention it, the device tree nodes are sorted
by memory order too! These should be after i2c3.

It looks like I might need to do a patch to re-order those too.

> Cheers,
> Maksim

John.

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