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Message-ID: <6fcd8e51-7e97-1261-7cd5-5e18840aaf8e@linaro.org>
Date: Sun, 6 Aug 2023 21:35:03 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: niravkumar.l.rabara@...el.com
Cc: adrian.ho.yin.ng@...el.com, andrew@...n.ch, conor+dt@...nel.org,
devicetree@...r.kernel.org, dinguyen@...nel.org,
krzysztof.kozlowski+dt@...aro.org, linux-clk@...r.kernel.org,
linux-kernel@...r.kernel.org, mturquette@...libre.com,
netdev@...r.kernel.org, p.zabel@...gutronix.de,
richardcochran@...il.com, robh+dt@...nel.org, sboyd@...nel.org,
wen.ping.teh@...el.com
Subject: Re: [PATCH v2 3/5] dt-bindings: clock: add Intel Agilex5 clock
manager
On 01/08/2023 03:02, niravkumar.l.rabara@...el.com wrote:
> From: Niravkumar L Rabara <niravkumar.l.rabara@...el.com>
>
> Add clock ID definitions for Intel Agilex5 SoCFPGA.
> The registers in Agilex5 handling the clock is named as clock manager.
>
> Signed-off-by: Teh Wen Ping <wen.ping.teh@...el.com>
> Reviewed-by: Dinh Nguyen <dinguyen@...nel.org>
> Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@...el.com>
> ---
Do not attach (thread) your patchsets to some other threads (unrelated
or older versions). This buries them deep in the mailbox and might
interfere with applying entire sets.
Best regards,
Krzysztof
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