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Message-ID: <DM6PR11MB3291E2046F9596358B6384F8A20CA@DM6PR11MB3291.namprd11.prod.outlook.com>
Date:   Mon, 7 Aug 2023 03:56:35 +0000
From:   "Rabara, Niravkumar L" <niravkumar.l.rabara@...el.com>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
CC:     "Ng, Adrian Ho Yin" <adrian.ho.yin.ng@...el.com>,
        "andrew@...n.ch" <andrew@...n.ch>,
        "conor+dt@...nel.org" <conor+dt@...nel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "dinguyen@...nel.org" <dinguyen@...nel.org>,
        "krzysztof.kozlowski+dt@...aro.org" 
        <krzysztof.kozlowski+dt@...aro.org>,
        "linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "Turquette, Mike" <mturquette@...libre.com>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "p.zabel@...gutronix.de" <p.zabel@...gutronix.de>,
        "richardcochran@...il.com" <richardcochran@...il.com>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "sboyd@...nel.org" <sboyd@...nel.org>,
        "wen.ping.teh@...el.com" <wen.ping.teh@...el.com>
Subject: RE: [PATCH v2 3/5] dt-bindings: clock: add Intel Agilex5 clock
 manager



> -----Original Message-----
> From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
> Sent: Monday, 7 August, 2023 3:35 AM
> To: Rabara, Niravkumar L <niravkumar.l.rabara@...el.com>
> Cc: Ng, Adrian Ho Yin <adrian.ho.yin.ng@...el.com>; andrew@...n.ch;
> conor+dt@...nel.org; devicetree@...r.kernel.org; dinguyen@...nel.org;
> krzysztof.kozlowski+dt@...aro.org; linux-clk@...r.kernel.org; linux-
> kernel@...r.kernel.org; Turquette, Mike <mturquette@...libre.com>;
> netdev@...r.kernel.org; p.zabel@...gutronix.de;
> richardcochran@...il.com; robh+dt@...nel.org; sboyd@...nel.org;
> wen.ping.teh@...el.com
> Subject: Re: [PATCH v2 3/5] dt-bindings: clock: add Intel Agilex5 clock
> manager
> 
> On 01/08/2023 03:02, niravkumar.l.rabara@...el.com wrote:
> > From: Niravkumar L Rabara <niravkumar.l.rabara@...el.com>
> >
> > Add clock ID definitions for Intel Agilex5 SoCFPGA.
> > The registers in Agilex5 handling the clock is named as clock manager.
> >
> > Signed-off-by: Teh Wen Ping <wen.ping.teh@...el.com>
> > Reviewed-by: Dinh Nguyen <dinguyen@...nel.org>
> > Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@...el.com>
> > ---
> 
> Do not attach (thread) your patchsets to some other threads (unrelated or
> older versions). This buries them deep in the mailbox and might interfere
> with applying entire sets.
> 
> Best regards,
> Krzysztof

Sorry it was a mistake.
Will be careful now onwards.

Thanks,
Nirav

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