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Message-ID: <f410c645-b1d1-2bc1-1271-0653eedb74e3@intel.com>
Date:   Mon, 7 Aug 2023 07:46:45 -0700
From:   Dave Hansen <dave.hansen@...el.com>
To:     kirill.shutemov@...ux.intel.com, Kai Huang <kai.huang@...el.com>
Cc:     peterz@...radead.org, linux-kernel@...r.kernel.org,
        tglx@...utronix.de, bp@...en8.de, mingo@...hat.com, hpa@...or.com,
        x86@...nel.org, seanjc@...gle.com, pbonzini@...hat.com,
        isaku.yamahata@...el.com,
        sathyanarayanan.kuppuswamy@...ux.intel.com,
        n.borisov.lkml@...il.com
Subject: Re: [PATCH v3 11/12] x86/virt/tdx: Allow SEAMCALL to handle #UD and
 #GP

On 8/6/23 04:41, kirill.shutemov@...ux.intel.com wrote:
> On Wed, Jul 26, 2023 at 11:25:13PM +1200, Kai Huang wrote:
>> @@ -20,6 +21,9 @@
>>  #define TDX_SW_ERROR			(TDX_ERROR | GENMASK_ULL(47, 40))
>>  #define TDX_SEAMCALL_VMFAILINVALID	(TDX_SW_ERROR | _UL(0xFFFF0000))
>>  
>> +#define TDX_SEAMCALL_GP			(TDX_SW_ERROR | X86_TRAP_GP)
>> +#define TDX_SEAMCALL_UD			(TDX_SW_ERROR | X86_TRAP_UD)
> Is there any explantion how these error codes got chosen? Looks very
> arbitrary and may collide with other error codes in the future.

If they collide, we can just fix it then.

So, please, do comment what the limitations are and what must be avoided
in the future, but I don't think we need to go mucking with this at all.

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