linux-kernel - Re: [PATCH v3 10/12] x86/virt/tdx: Wire up basic SEAMCALL functions

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Message-ID: <048399f29d702435c41b11c3ff16a1ae257f70cd.camel@intel.com>
Date:   Mon, 7 Aug 2023 23:51:01 +0000
From:   "Huang, Kai" <kai.huang@...el.com>
To:     "Christopherson,, Sean" <seanjc@...gle.com>
CC:     "Hansen, Dave" <dave.hansen@...el.com>,
        "bp@...en8.de" <bp@...en8.de>, "x86@...nel.org" <x86@...nel.org>,
        "peterz@...radead.org" <peterz@...radead.org>,
        "hpa@...or.com" <hpa@...or.com>,
        "mingo@...hat.com" <mingo@...hat.com>,
        "kirill.shutemov@...ux.intel.com" <kirill.shutemov@...ux.intel.com>,
        "tglx@...utronix.de" <tglx@...utronix.de>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "pbonzini@...hat.com" <pbonzini@...hat.com>,
        "Yamahata, Isaku" <isaku.yamahata@...el.com>,
        "sathyanarayanan.kuppuswamy@...ux.intel.com" 
        <sathyanarayanan.kuppuswamy@...ux.intel.com>,
        "n.borisov.lkml@...il.com" <n.borisov.lkml@...il.com>
Subject: Re: [PATCH v3 10/12] x86/virt/tdx: Wire up basic SEAMCALL functions

On Mon, 2023-08-07 at 07:30 -0700, Sean Christopherson wrote:
> On Mon, Aug 07, 2023, Kai Huang wrote:
> > 
> > > >  
> > > > +config INTEL_TDX_HOST
> > > > +	bool "Intel Trust Domain Extensions (TDX) host support"
> > > > +	depends on CPU_SUP_INTEL
> > > > +	depends on X86_64
> > > > +	depends on KVM_INTEL
> > > 
> > > Hm. I expected KVM_INTEL to depend on CPU_SUP_INTEL, but apparently no.
> > > Any reasons why?
> > 
> > Hmm.. Not sure :-)
> 
> Centuar and Zhaoxin CPUs also support VMX.
> 
>   commit 8f63aaf5c493c6502a058585cdfa3c71cdf8c44a
>   Author: Sean Christopherson <seanjc@...gle.com>
>   Date:   Fri Dec 20 20:45:13 2019 -0800
> 
>     KVM: VMX: Allow KVM_INTEL when building for Centaur and/or Zhaoxin CPUs
>     
>     Change the dependency for KVM_INTEL, i.e. KVM w/ VMX, from Intel CPUs to
>     any CPU that supports the IA32_FEAT_CTL MSR and thus VMX functionality.
>     This effectively allows building KVM_INTEL for Centaur and Zhaoxin CPUs.
> 

Ah. Thanks Sean!