lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Mon, 7 Aug 2023 10:28:54 -0500
From:   Andrew Davis <afd@...com>
To:     Dhruva Gole <d-gole@...com>, Nishanth Menon <nm@...com>,
        Vignesh Raghavendra <vigneshr@...com>,
        Tero Kristo <kristo@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>,
        <linux-arm-kernel@...ts.infradead.org>
CC:     <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 10/13] arm64: dts: ti: k3-j7200: Enable GPIO nodes at the
 board level

On 8/7/23 12:38 AM, Dhruva Gole wrote:
> Andrew,
> 
> On 03/08/23 02:23, Andrew Davis wrote:
>> GPIO nodes defined in the top-level J7200 SoC dtsi files are incomplete
>> and may not be functional unless they are extended with pinmux and
>> device information.
>>
>> Disable the GPIO nodes in the dtsi files and only enable the ones that
>> are actually pinned out on a given board.
>>
>> Signed-off-by: Andrew Davis <afd@...com>
>> ---
>>   .../boot/dts/ti/k3-j7200-common-proc-board.dts | 18 ++++--------------
>>   arch/arm64/boot/dts/ti/k3-j7200-main.dtsi      |  4 ++++
>>   .../arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi |  2 ++
>>   3 files changed, 10 insertions(+), 14 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
>> index dee9056f56051..4a5c4f36baeec 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
>> +++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
>> @@ -240,27 +240,17 @@ &main_uart3 {
>>       pinctrl-0 = <&main_uart3_pins_default>;
>>   };
>> -&main_gpio2 {
>> -    status = "disabled";
>> -};
>> -
>> -&main_gpio4 {
>> -    status = "disabled";
>> -};
>> -
>> -&main_gpio6 {
>> -    status = "disabled";
>> +&main_gpio0 {
>> +    status = "okay";
>> +    /* default pins */
> 
> Small question, where is the pmx for main_gpio0? What does "default pins"
> refer to here? Where are they pinmuxed?
> 

Good question, where is the pmx for main_gpio0? I don't know, it was
never defined before either, we only are noticing this now as we are
disabling by default instead of leaving an unfinished node enabled
by default. (another benefit of this disabled by default scheme).

What is really happening is GPIO nodes we tend to pinmux differently
than normal device nodes. Their pinmux selections tends to be spread
out in all the nodes that make use of these GPIO pins, not all together
here in this node.

For instance in this device we use one of the main_gpio0 pins as a
GPIO toggled regulator, and we define the pinmux for it in that node
(see vdd-sd-dv-default-pins).

We can either define the rest of the pins not used elsewhere
here, or we can consider GPIO an exception to the rule, I'd say
the latter is fine for now.

Andrew

>>   };
>>   &wkup_gpio0 {
>> +    status = "okay";
>>       pinctrl-names = "default";
>>       pinctrl-0 = <&wkup_gpio_pins_default>;
>>   };
>> -&wkup_gpio1 {
>> -    status = "disabled";
>> -};
>> -
>>   &mcu_cpsw {
>>       pinctrl-names = "default";
>>       pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>;
>> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
>> index 5d7542ba41b93..6a776f3bbcb19 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
>> @@ -832,6 +832,7 @@ main_gpio0: gpio@...000 {
>>           power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
>>           clocks = <&k3_clks 105 0>;
>>           clock-names = "gpio";
>> +        status = "disabled";
>>       };
>>       main_gpio2: gpio@...000 {
>> @@ -849,6 +850,7 @@ main_gpio2: gpio@...000 {
>>           power-domains = <&k3_pds 107 TI_SCI_PD_EXCLUSIVE>;
>>           clocks = <&k3_clks 107 0>;
>>           clock-names = "gpio";
>> +        status = "disabled";
>>       };
>>       main_gpio4: gpio@...000 {
>> @@ -866,6 +868,7 @@ main_gpio4: gpio@...000 {
>>           power-domains = <&k3_pds 109 TI_SCI_PD_EXCLUSIVE>;
>>           clocks = <&k3_clks 109 0>;
>>           clock-names = "gpio";
>> +        status = "disabled";
>>       };
>>       main_gpio6: gpio@...000 {
>> @@ -883,6 +886,7 @@ main_gpio6: gpio@...000 {
>>           power-domains = <&k3_pds 111 TI_SCI_PD_EXCLUSIVE>;
>>           clocks = <&k3_clks 111 0>;
>>           clock-names = "gpio";
>> +        status = "disabled";
>>       };
>>       main_spi0: spi@...0000 {
>> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
>> index 571eb0e2eac92..5ae7320efad7b 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
>> @@ -297,6 +297,7 @@ wkup_gpio0: gpio@...10000 {
>>           power-domains = <&k3_pds 113 TI_SCI_PD_EXCLUSIVE>;
>>           clocks = <&k3_clks 113 0>;
>>           clock-names = "gpio";
>> +        status = "disabled";
>>       };
>>       wkup_gpio1: gpio@...00000 {
>> @@ -313,6 +314,7 @@ wkup_gpio1: gpio@...00000 {
>>           power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
>>           clocks = <&k3_clks 114 0>;
>>           clock-names = "gpio";
>> +        status = "disabled";
>>       };
>>       mcu_navss: bus@...80000 {
> 

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ