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Message-ID: <f14b1014-1f0a-c65a-943c-2933c9ca2a4e@microchip.com>
Date: Thu, 10 Aug 2023 05:27:49 +0000
From: <Varshini.Rajendran@...rochip.com>
To: <tudor.ambarus@...aro.org>, <krzysztof.kozlowski+dt@...aro.org>,
<conor+dt@...nel.org>, <Nicolas.Ferre@...rochip.com>,
<claudiu.beznea@...rochip.com>, <linux-mtd@...ts.infradead.org>,
<robh+dt@...nel.org>, <devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <miquel.raynal@...tlin.com>,
<richard@....at>, <vigneshr@...com>,
<alexandre.belloni@...tlin.com>
Subject: Re: [PATCH v3 20/50] dt-bindings: atmel-nand: add
microchip,sam9x7-pmecc
On 28/07/23 4:36 pm, Tudor Ambarus wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> On 7/28/23 11:26, Varshini Rajendran wrote:
>> Add microchip,sam9x7-pmecc to DT bindings documentation.
>>
>
> Why? What's the underlying problem that motivated you do this patch?
Hi Tudor,
The motivation is to have compatibles specific to the SoC. I am aware
that there is no change in the IP nor the driver. As Krzysztof mentioned
in another patch, this is just to add a SoC specific compatible string.
Hope this clears the query.
>
>> Signed-off-by: Varshini Rajendran <varshini.rajendran@...rochip.com>
>> ---
>> Documentation/devicetree/bindings/mtd/atmel-nand.txt | 1 +
>> 1 file changed, 1 insertion(+)
>>
>> diff --git a/Documentation/devicetree/bindings/mtd/atmel-nand.txt b/Documentation/devicetree/bindings/mtd/atmel-nand.txt
>> index 50645828ac20..4598930851d9 100644
>> --- a/Documentation/devicetree/bindings/mtd/atmel-nand.txt
>> +++ b/Documentation/devicetree/bindings/mtd/atmel-nand.txt
>> @@ -56,6 +56,7 @@ Required properties:
>> "atmel,sama5d4-pmecc"
>> "atmel,sama5d2-pmecc"
>> "microchip,sam9x60-pmecc"
>> + "microchip,sam9x7-pmecc", "atmel,at91sam9g45-pmecc"
>> - reg: should contain 2 register ranges. The first one is pointing to the PMECC
>> block, and the second one to the PMECC_ERRLOC block.
>>
--
Thanks and Regards,
Varshini Rajendran.
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