lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Thu, 10 Aug 2023 15:27:19 +0800
From:   wenhua lin <wenhua.lin1994@...il.com>
To:     Andy Shevchenko <andy@...nel.org>
Cc:     Wenhua Lin <Wenhua.Lin@...soc.com>,
        Linus Walleij <linus.walleij@...aro.org>,
        Bartosz Golaszewski <brgl@...ev.pl>,
        Orson Zhai <orsonzhai@...il.com>,
        Baolin Wang <baolin.wang@...ux.alibaba.com>,
        Chunyan Zhang <zhang.lyra@...il.com>,
        linux-serial@...r.kernel.org, linux-kernel@...r.kernel.org,
        Xiongpeng Wu <xiongpeng.wu@...soc.com>
Subject: Re: [PATCH 3/3] gpio: sprd: Add clear interrupt

On Tue, Aug 8, 2023 at 9:25 PM Andy Shevchenko <andy@...nel.org> wrote:
>
> On Tue, Aug 08, 2023 at 11:31:44AM +0800, Wenhua Lin wrote:
> > Clear interrupt after set the interrupt type.
>
> Why?
>
> Can't it be done in the ->init_hw() callback of GPIO IRQ chip?

Hi Andy:
The initialization state of EIC is high-level trigger. If the external
level is high and the interrupt condition is met,
EIC has a latch function. If the module registers the eic interrupt,
an interrupt will be generated immediately
 as soon as the eic interrupt is enabled. To solve this problem, our
processing method is to clear the interrupt
 once when setting the interrupt trigger type, in order to avoid that
this interrupt is the last interrupt.

Thanks
Wenhua.Lin

>
> --
> With Best Regards,
> Andy Shevchenko
>
>

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ