lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Mon, 14 Aug 2023 10:36:08 -0700
From:   Ian Rogers <irogers@...gle.com>
To:     John Garry <john.g.garry@...cle.com>
Cc:     Ilkka Koskinen <ilkka@...amperecomputing.com>,
        Arnaldo Carvalho de Melo <acme@...nel.org>,
        Will Deacon <will@...nel.org>,
        James Clark <james.clark@....com>,
        Mike Leach <mike.leach@...aro.org>,
        Leo Yan <leo.yan@...aro.org>,
        Peter Zijlstra <peterz@...radead.org>,
        Ingo Molnar <mingo@...hat.com>,
        Mark Rutland <mark.rutland@....com>,
        Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
        Jiri Olsa <jolsa@...nel.org>,
        Namhyung Kim <namhyung@...nel.org>,
        Adrian Hunter <adrian.hunter@...el.com>,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-perf-users@...r.kernel.org,
        Dave Kleikamp <dave.kleikamp@...cle.com>
Subject: Re: [PATCH 1/4] perf vendor events arm64: Remove L1D_CACHE_LMISS from
 AmpereOne list

On Fri, Aug 4, 2023 at 4:02 AM John Garry <john.g.garry@...cle.com> wrote:
>
> On 03/08/2023 22:13, Ilkka Koskinen wrote:
> > amperene/cache.json file tried to include L1D_CACHE_LMISS while it
> > doesn't exist in common-and-microarch.json. While this bug doesn't seem to
> > cause issue in newer kernels with jevents.py script, it prevents building
> > older perf tools with the backported patch.

Fwiw, newer perf tool on old kernel should always be fine. But I
understand that if you are trying to build a tree with backports in
it...

>
> jevents.py needs to be improved so it errors on these events which
> cannot be fixed up, like it used to. I'll look to do that when I get a
> chance.
>
> >
> > Fixes: a9650b7f6fc0 ("perf vendor events arm64: Add AmpereOne core PMU events")
> > Reported-by: Dave Kleikamp <dave.kleikamp@...cle.com>
> > Closes: https://urldefense.com/v3/__https://lore.kernel.org/all/76bb2e47-ce44-76ae-838e-53279047084d@oracle.com/__;!!ACWV5N9M2RV99hQ!IlO3yUW8jhm6wp8BJalODmD7WjzJleyREtTWS2pdn90Af5BD3P7g0fTGldbw15pSn49ycWiKpWDysjXw_ECS4XbbJQ$
> > Signed-off-by: Ilkka Koskinen <ilkka@...amperecomputing.com>
>
> Reviewed-by: John Garry <john.g.garry@...cle.com>

Reviewed-by: Ian Rogers <irogers@...gle.com>

Thanks,
Ian

> > ---
> >   tools/perf/pmu-events/arch/arm64/ampere/ampereone/cache.json | 3 ---
> >   1 file changed, 3 deletions(-)
> >
> > diff --git a/tools/perf/pmu-events/arch/arm64/ampere/ampereone/cache.json b/tools/perf/pmu-events/arch/arm64/ampere/ampereone/cache.json
> > index fc0633054211..7a2b7b200f14 100644
> > --- a/tools/perf/pmu-events/arch/arm64/ampere/ampereone/cache.json
> > +++ b/tools/perf/pmu-events/arch/arm64/ampere/ampereone/cache.json
> > @@ -92,9 +92,6 @@
> >       {
> >           "ArchStdEvent": "L1D_CACHE_LMISS_RD"
> >       },
> > -    {
> > -        "ArchStdEvent": "L1D_CACHE_LMISS"
> > -    },
> >       {
> >           "ArchStdEvent": "L1I_CACHE_LMISS"
> >       },
>

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ