[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20230815063526.9022-2-ilkka@os.amperecomputing.com>
Date: Mon, 14 Aug 2023 23:35:23 -0700
From: Ilkka Koskinen <ilkka@...amperecomputing.com>
To: Will Deacon <will@...nel.org>, Robin Murphy <robin.murphy@....com>,
Besar Wicaksono <bwicaksono@...dia.com>,
Jonathan Cameron <Jonathan.Cameron@...wei.com>,
Suzuki K Poulose <suzuki.poulose@....com>,
Mark Rutland <mark.rutland@....com>,
Jonathan Corbet <corbet@....net>
Cc: Ilkka Koskinen <ilkka@...amperecomputing.com>,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-doc@...r.kernel.org
Subject: [PATCH v6 1/4] perf: arm_cspmu: Split 64-bit write to 32-bit writes
Split the 64-bit register accesses if 64-bit access is not supported
by the PMU.
Signed-off-by: Ilkka Koskinen <ilkka@...amperecomputing.com>
Reviewed-by: Besar Wicaksono <bwicaksono@...dia.com>
---
drivers/perf/arm_cspmu/arm_cspmu.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/perf/arm_cspmu/arm_cspmu.c b/drivers/perf/arm_cspmu/arm_cspmu.c
index 04be94b4aa48..6387cbad7a7d 100644
--- a/drivers/perf/arm_cspmu/arm_cspmu.c
+++ b/drivers/perf/arm_cspmu/arm_cspmu.c
@@ -715,7 +715,10 @@ static void arm_cspmu_write_counter(struct perf_event *event, u64 val)
if (use_64b_counter_reg(cspmu)) {
offset = counter_offset(sizeof(u64), event->hw.idx);
- writeq(val, cspmu->base1 + offset);
+ if (cspmu->has_atomic_dword)
+ writeq(val, cspmu->base1 + offset);
+ else
+ lo_hi_writeq(val, cspmu->base1 + offset);
} else {
offset = counter_offset(sizeof(u32), event->hw.idx);
--
2.41.0
Powered by blists - more mailing lists