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Message-ID: <3174c398-a19a-3b59-c2fc-3ec9a5e1a9df@linaro.org>
Date: Tue, 15 Aug 2023 16:40:15 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Robert Marko <robimarko@...il.com>, agross@...nel.org,
andersson@...nel.org, konrad.dybcio@...aro.org,
wim@...ux-watchdog.org, linux@...ck-us.net, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
quic_saipraka@...cinc.com, linux-arm-msm@...r.kernel.org,
linux-watchdog@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/2] arm64: dts: qcom: ipq5018: add WDT
On 15/08/2023 16:17, Robert Marko wrote:
> Add the required DT node for WDT operation.
>
> Signed-off-by: Robert Marko <robimarko@...il.com>
> ---
> arch/arm64/boot/dts/qcom/ipq5018.dtsi | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
> index 3285c86824cf..168322bfb11c 100644
> --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
> +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
> @@ -182,6 +182,13 @@ v2m1: v2m@...0 {
> };
> };
>
> + watchdog: watchdog@...7000 {
> + compatible = "qcom,apss-wdt-ipq5018", "qcom,kpss-wdt";
> + interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
I think all GIC_SPI interrupts are level high.
> + reg = <0x0b017000 0x40>;
Keep the reg as second property.
> + clocks = <&sleep_clk>;
> + };
Best regards,
Krzysztof
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