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Message-ID: <20230816204143.66281-10-mario.limonciello@amd.com>
Date: Wed, 16 Aug 2023 15:41:43 -0500
From: Mario Limonciello <mario.limonciello@....com>
To: "Rafael J . Wysocki" <rafael@...nel.org>,
Mika Westerberg <mika.westerberg@...ux.intel.com>,
Bjorn Helgaas <helgaas@...nel.org>
CC: <linux-pci@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
"Andy Shevchenko" <andriy.shevchenko@...ux.intel.com>,
<linux-acpi@...r.kernel.org>,
Kuppuswamy Sathyanarayanan
<sathyanarayanan.kuppuswamy@...ux.intel.com>,
"Iain Lane" <iain@...ngesquash.org.uk>,
Shyam-sundar S-k <Shyam-sundar.S-k@....com>,
Mario Limonciello <mario.limonciello@....com>
Subject: [PATCH v12 9/9] ACPI: x86: s2idle: Enforce LPS0 constraints for PCI devices
Since commit 9d26d3a8f1b0 ("PCI: Put PCIe ports into D3 during suspend")
PCIe ports from modern machines (>=2015) are allowed to be put into D3 by
storing a value to the `bridge_d3` variable in the `struct pci_dev`
structure.
pci_power_manageable() uses this variable to indicate a PCIe port can
enter D3.
pci_pm_suspend_noirq() uses the return from pci_power_manageable() to
decide whether to try to put a device into its target state for a sleep
cycle via pci_prepare_to_sleep().
For devices that support D3, the target state is selected by this policy:
1. If platform_pci_power_manageable():
Use platform_pci_choose_state()
2. If the device is armed for wakeup:
Select the deepest D-state that supports a PME.
3. Else:
Use D3hot.
Devices are considered power manageable by the platform when they have
one or more objects described in the table in section 7.3 of the ACPI 6.5
specification [1].
When devices are not considered power manageable; specs are ambiguous as
to what should happen. Linux puts PCIe ports into D3 due to the above
described policy. Windows 11 uses the PoFX framework to let the an
SOC specific Power Engine Plugin (PEP) [2] [3] [4] to decide what to do
with those devices.
Specifically Microsoft documentation says:
```
Devices that are integrated into the SoC can be power-managed through
the Windows Power Framework (PoFx). These framework-integrated devices
are power-managed by PoFx through a SoC-specific power engine plug-in
(microPEP) that knows the specifics of the SoC's power and clock controls.
```
Effectively this causes PCIe root ports on a variety of AMD systems to be
put into D0 on Windows 11 but D3 on Linux.
Instead of only using constraints for debugging messages use them to
enforce that PCI devices have been put into the expected state when
the system is being put into s2idle.
* If a device constraint is present but disabled then choose D0.
* If a device constraint is present and enabled then use it.
Link: https://uefi.org/specs/ACPI/6.5/07_Power_and_Performance_Mgmt.html#device-power-management-objects [1]
Link: https://learn.microsoft.com/en-us/windows-hardware/design/device-experiences/platform-design-for-modern-standby#low-power-core-silicon-cpu-soc-dram [2]
Link: https://uefi.org/sites/default/files/resources/Intel_ACPI_Low_Power_S0_Idle.pdf [3]
Link: https://learn.microsoft.com/en-us/windows-hardware/drivers/bringup/device-power-management#device-power-management-in-windows [4]
Fixes: 9d26d3a8f1b0 ("PCI: Put PCIe ports into D3 during suspend")
Reported-by: Iain Lane <iain@...ngesquash.org.uk>
Closes: https://forums.lenovo.com/t5/Ubuntu/Z13-can-t-resume-from-suspend-with-external-USB-keyboard/m-p/5217121
Signed-off-by: Mario Limonciello <mario.limonciello@....com>
---
drivers/acpi/x86/s2idle.c | 51 ++++++++++++++++++++++++++++++++-------
1 file changed, 42 insertions(+), 9 deletions(-)
diff --git a/drivers/acpi/x86/s2idle.c b/drivers/acpi/x86/s2idle.c
index 8bda45579d44a..5192a7147655d 100644
--- a/drivers/acpi/x86/s2idle.c
+++ b/drivers/acpi/x86/s2idle.c
@@ -16,6 +16,7 @@
*/
#include <linux/acpi.h>
+#include <linux/pci.h>
#include <linux/device.h>
#include <linux/dmi.h>
#include <linux/suspend.h>
@@ -300,28 +301,61 @@ static void lpi_device_get_constraints(void)
ACPI_FREE(out_obj);
}
+static void lpi_check_pci_dev(struct lpi_constraints *entry, struct pci_dev *pdev)
+{
+ pci_power_t target = entry->enabled ? entry->min_dstate : PCI_D0;
+
+ if (pdev->current_state == target)
+ return;
+
+ /* constraint of ACPI D3hot means PCI D3hot _or_ D3cold */
+ if (target == ACPI_STATE_D3_HOT &&
+ (pdev->current_state == PCI_D3hot ||
+ pdev->current_state == PCI_D3cold))
+ return;
+
+ if (pm_debug_messages_on)
+ acpi_handle_info(entry->handle,
+ "LPI: PCI device in %s, not in %s\n",
+ acpi_power_state_string(pdev->current_state),
+ acpi_power_state_string(target));
+
+ /* don't try with things that PCI core hasn't touched */
+ if (pdev->current_state == PCI_UNKNOWN) {
+ entry->handle = NULL;
+ return;
+ }
+
+ pci_set_power_state(pdev, target);
+}
+
static void lpi_check_constraints(void)
{
struct lpi_constraints *entry;
for_each_lpi_constraint(entry) {
struct acpi_device *adev = acpi_fetch_acpi_dev(entry->handle);
+ struct device *dev;
if (!adev)
continue;
+ /* Check and adjust PCI devices explicitly */
+ dev = acpi_get_first_physical_node(adev);
+ if (dev && dev_is_pci(dev)) {
+ lpi_check_pci_dev(entry, to_pci_dev(dev));
+ continue;
+ }
+ if (!entry->enabled)
+ continue;
acpi_handle_debug(entry->handle,
"LPI: required min power state:%s current power state:%s\n",
acpi_power_state_string(entry->min_dstate),
acpi_power_state_string(adev->power.state));
- if (!adev->flags.power_manageable) {
- acpi_handle_info(entry->handle, "LPI: Device not power manageable\n");
- entry->handle = NULL;
- continue;
- }
-
- if (adev->power.state < entry->min_dstate)
+ if (pm_debug_messages_on &&
+ adev->flags.power_manageable &&
+ adev->power.state < entry->min_dstate)
acpi_handle_info(entry->handle,
"LPI: Constraint not met; min power state:%s current power state:%s\n",
acpi_power_state_string(entry->min_dstate),
@@ -512,8 +546,7 @@ int acpi_s2idle_prepare_late(void)
if (!lps0_device_handle || sleep_no_lps0)
return 0;
- if (pm_debug_messages_on)
- lpi_check_constraints();
+ lpi_check_constraints();
/* Screen off */
if (lps0_dsm_func_mask > 0)
--
2.34.1
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