linux-kernel - Re: [PATCH 2/4] clk: qcom: branch: Add mem ops support for branch2 clocks

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Tue, 22 Aug 2023 11:52:59 -0700
From:   Stephen Boyd <sboyd@...nel.org>
To:     Andy Gross <agross@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Imran Shaik <quic_imrashai@...cinc.com>,
        Konrad Dybcio <konrad.dybcio@...aro.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Michael Turquette <mturquette@...libre.com>,
        Rob Herring <robh+dt@...nel.org>
Cc:     Taniya Das <quic_tdas@...cinc.com>,
        Imran Shaik <quic_imrashai@...cinc.com>,
        linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        Ajit Pandey <quic_ajipan@...cinc.com>,
        Jagadeesh Kona <quic_jkona@...cinc.com>
Subject: Re: [PATCH 2/4] clk: qcom: branch: Add mem ops support for branch2 clocks

Quoting Imran Shaik (2023-08-07 22:14:05)
> diff --git a/drivers/clk/qcom/clk-branch.h b/drivers/clk/qcom/clk-branch.h
> index 0cf800b9d08d..0ffda6bef00e 100644
> --- a/drivers/clk/qcom/clk-branch.h
> +++ b/drivers/clk/qcom/clk-branch.h
> @@ -24,8 +24,11 @@
>  struct clk_branch {
>         u32     hwcg_reg;
>         u32     halt_reg;
> +       u32     mem_enable_reg;
> +       u32     mem_ack_reg;
>         u8      hwcg_bit;
>         u8      halt_bit;
> +       u8      mem_enable_ack_bit;
>         u8      halt_check;
>  #define BRANCH_VOTED                   BIT(7) /* Delay on disable */
>  #define BRANCH_HALT                    0 /* pol: 1 = halt */

I suspect making a wrapper around struct clk_branch would be a better
approach so that we don't bloat all the other clk_branch structures that
exist in the qcom clk drivers.

 $ git grep 'struct clk_branch' -- drivers/clk/qcom | wc -l
   6357

How many of these are going to be using these new registers? It may also
make sense to do that for hardware clock gating as well, but I'm not
really sure. Anyway, the idea is

	struct clk_mem_branch {
		u32 enable_reg;
		u32 ack_reg;
		u8  ack_bit;
		struct clk_branch branch;
	};

and then a container_of define. Plus, you can put some comment above the
structure to describe when these clks are used.