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Message-ID: <bdb155fe-aed1-e29b-e1c5-560495ee3ef1@quicinc.com>
Date: Tue, 22 Aug 2023 17:16:57 +0530
From: Imran Shaik <quic_imrashai@...cinc.com>
To: Konrad Dybcio <konrad.dybcio@...aro.org>,
Andy Gross <agross@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Bjorn Andersson <andersson@...nel.org>
CC: Taniya Das <quic_tdas@...cinc.com>,
<linux-arm-msm@...r.kernel.org>, <linux-clk@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
Ajit Pandey <quic_ajipan@...cinc.com>,
Jagadeesh Kona <quic_jkona@...cinc.com>
Subject: Re: [PATCH 4/4] arm64: dts: qcom: qdu1000: Add ECPRI clock controller
On 8/10/2023 1:30 AM, Konrad Dybcio wrote:
> On 8.08.2023 07:14, Imran Shaik wrote:
>> Add device node for ECPRI clock controller on qcom QDU1000
>> and QRU1000 SoCs.
>>
>> Signed-off-by: Imran Shaik <quic_imrashai@...cinc.com>
>> ---
>> arch/arm64/boot/dts/qcom/qdu1000.dtsi | 14 ++++++++++++++
>> 1 file changed, 14 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
>> index 1c0e5d271e91..63930f944b65 100644
>> --- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
>> @@ -381,6 +381,20 @@ gcc: clock-controller@...00 {
>> #power-domain-cells = <1>;
>> };
>>
>> + ecpricc: clock-controller@...000 {
>> + compatible = "qcom,qdu1000-ecpricc";
>> + reg = <0x0 0x00280000 0x0 0x31c00>;
>> + clocks = <&rpmhcc RPMH_CXO_CLK>,
>> + <&gcc GCC_ECPRI_CC_GPLL0_CLK_SRC>,
>> + <&gcc GCC_ECPRI_CC_GPLL1_EVEN_CLK_SRC>,
>> + <&gcc GCC_ECPRI_CC_GPLL2_EVEN_CLK_SRC>,
>> + <&gcc GCC_ECPRI_CC_GPLL3_CLK_SRC>,
>> + <&gcc GCC_ECPRI_CC_GPLL4_CLK_SRC>,
>> + <&gcc GCC_ECPRI_CC_GPLL5_EVEN_CLK_SRC>;
> Please align the entries with the first < (probably missing a single
> space in the front)
>
> Konrad
Sure, will update and push next series.
Thanks,
Imran
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