linux-kernel - Re: [patch V4 24/41] x86/cpu: Provide cpu_init/parse

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Message-ID: <abb65e60-4e8b-7036-4401-d21b273b6d67@linux.intel.com>
Date:   Mon, 28 Aug 2023 07:34:32 -0700
From:   Arjan van de Ven <arjan@...ux.intel.com>
To:     K Prateek Nayak <kprateek.nayak@....com>,
        Thomas Gleixner <tglx@...utronix.de>,
        LKML <linux-kernel@...r.kernel.org>
Cc:     x86@...nel.org, Tom Lendacky <thomas.lendacky@....com>,
        Andrew Cooper <andrew.cooper3@...rix.com>,
        Huang Rui <ray.huang@....com>, Juergen Gross <jgross@...e.com>,
        Dimitri Sivanich <dimitri.sivanich@....com>,
        Michael Kelley <mikelley@...rosoft.com>,
        Wei Liu <wei.liu@...nel.org>, Pu Wen <puwen@...on.cn>,
        Qiuxu Zhuo <qiuxu.zhuo@...el.com>,
        Sohil Mehta <sohil.mehta@...el.com>,
        Gautham Shenoy <gautham.shenoy@....com>
Subject: Re: [patch V4 24/41] x86/cpu: Provide cpu_init/parse_topology()

On 8/28/2023 7:28 AM, K Prateek Nayak wrote:
>>     - Are these really different between AMD and Intel or is this some
>>       naming convention issue which needs to be resolved?
> 	They do have different characteristics since, on Sapphire
> 	Rapids, the LLC is at a socket boundary despite having multiple
> 	tiles. (Please correct me if I'm wrong, I'm going off of
> 	llc_id shared in this report by Qiuxu Zhuo -
> 	https://lore.kernel.org/all/20230809161219.83084-1-qiuxu.zhuo@intel.com/)
> 

Sapphire reports itself as 1 tile though (since logically it is) as far as I know