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Message-ID: <e0a4ba7d-7cc0-2b51-994f-9f48284dcf02@linaro.org>
Date:   Wed, 30 Aug 2023 19:35:42 +0100
From:   Bryan O'Donoghue <bryan.odonoghue@...aro.org>
To:     rfoss@...nel.org, todor.too@...il.com, agross@...nel.org,
        andersson@...nel.org, konrad.dybcio@...aro.org, mchehab@...nel.org,
        hverkuil-cisco@...all.nl, laurent.pinchart@...asonboard.com,
        sakari.ailus@...ux.intel.com, andrey.konovalov@...aro.org
Cc:     linux-media@...r.kernel.org, linux-arm-msm@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 00/10] media: qcom: camss: Bugfix series

On 30/08/2023 16:16, Bryan O'Donoghue wrote:
> V3:
> - Adds Reviewed-by where indicated - Laurent
> - Adds a new patch for genpd cleanup. TBH I completely missed this so thanks ! - Laurent
> - "media: qcom: camss: Fix V4L2 async notifier error path" stays the same fixes spalt in -next
>    Fixes: 51397a4ec75d ("media: qcom: Initialise V4L2 async notifier later")
> - I like the suggesting of using a common fix for vfe-17x and vfe-480 however, I believe
>    we need to support multiple write-master/RDI => VCs in 17x which currently we only do
>    in vfe-480 so sharing the code between the two here right now, is	n't possible.
> - Included other suggestions on vfe-17x and vfe-480 - Laurent
> - I didn't change the val |= 1 << CSI2_RX_CFG1_VC_MODE to BIT(2)
>    The reason for that is all of the code uses this odd bit-shifting and I'd rather do
>    the conversion from shifting to BIT(x) as a distinct series instead of piecemeal - bod

Pardon me I forgot to add a link to a tree for this series

Link: 
https://git.codelinaro.org/bryan.odonoghue/kernel/-/commits/c13bb323d4f081d634dca3a9f3f56fbee370e8f4

---
bod

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