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Message-ID: <f7a350a9-5580-c3b9-a917-69a9b16dbf41@quicinc.com>
Date:   Wed, 30 Aug 2023 12:18:57 +0530
From:   Gokul Sriram P <quic_gokulsri@...cinc.com>
To:     Robert Marko <robimarko@...il.com>,
        Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
CC:     <agross@...nel.org>, <andersson@...nel.org>,
        <konrad.dybcio@...aro.org>, <mturquette@...libre.com>,
        <sboyd@...nel.org>, <robh+dt@...nel.org>,
        <krzysztof.kozlowski+dt@...aro.org>, <jassisinghbrar@...il.com>,
        <linux-arm-msm@...r.kernel.org>, <linux-clk@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <quic_varada@...cinc.com>, <quic_srichara@...cinc.com>
Subject: Re: [PATCH 3/3] arm64: dts: qcom: ipq5018: enable the CPUFreq support


>>>>>    #include <dt-bindings/interrupt-controller/arm-gic.h>
>>>>>    #include <dt-bindings/clock/qcom,gcc-ipq5018.h>
>>>>>    #include <dt-bindings/reset/qcom,gcc-ipq5018.h>
>>>>> +#include <dt-bindings/clock/qcom,apss-ipq.h>
>>>> c is before r.
  Sure, will update.

[...]
>>>>
>>>>> +   cpu_opp_table: opp-table-cpu {
>>>>> +           compatible = "operating-points-v2";
>>>>> +           opp-shared;
>>>>> +
>>>>> +           opp-1008000000 {
>>>>> +                   opp-hz = /bits/ 64 <1008000000>;
>>>>> +                   opp-microvolt = <1100000>;
>>>>> +                   clock-latency-ns = <200000>;
>>>> And the rest of OPPs?
>>> Hi Krzysztof,
>>> IPQ5018 only supports running at 1.1GHz, but its running at 800MHz
>>> by default from the bootloader so there is only one OPP.
>> Isn't this contradictory? If it is running at 800 initially, then it
>> supports running at 800...
> I can only guess that it's not validated at 800MHz.
As per the h/w design team, there is negligible power or thermal benefit 
by lowering to 800MHz clock.
Hence, 800MHz opp wasn't included here.
>
> Regards,
> Robert
>>
>> Best regards,
>> Krzysztof
>>

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