linux-kernel - Re: [PATCH 5/5] drm/bridge: samsung-dsim: calculate porches in Hz

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Message-ID: <53ee3d14-05f4-981f-26d2-ef9ef6b3a61b@gmail.com>
Date:   Mon, 4 Sep 2023 16:28:37 +0200
From:   Maxim Schwalm <maxim.schwalm@...il.com>
To:     Michael Tretter <m.tretter@...gutronix.de>
Cc:     kernel@...gutronix.de, linux-kernel@...r.kernel.org,
        dri-devel@...ts.freedesktop.org, Inki Dae <inki.dae@...sung.com>,
        Jagan Teki <jagan@...rulasolutions.com>,
        Marek Szyprowski <m.szyprowski@...sung.com>,
        Andrzej Hajda <andrzej.hajda@...el.com>,
        Neil Armstrong <neil.armstrong@...aro.org>,
        Robert Foss <rfoss@...nel.org>,
        Laurent Pinchart <Laurent.pinchart@...asonboard.com>,
        Jonas Karlman <jonas@...boo.se>,
        Jernej Skrabec <jernej.skrabec@...il.com>,
        David Airlie <airlied@...il.com>,
        Daniel Vetter <daniel@...ll.ch>
Subject: Re: [PATCH 5/5] drm/bridge: samsung-dsim: calculate porches in Hz

Hi,

On 28.08.23 17:59, Michael Tretter wrote:
> Calculating the byte_clk in kHz is imprecise for a hs_clock of 55687500
> Hz, which may be used with a pixel clock of 74.25 MHz with mode
> 1920x1080-30.
> 
> Fix the calculation by using HZ instead of kHZ.
> 
> This requires to change the type to u64 to prevent overflows of the
> integer type.
> 
> Signed-off-by: Michael Tretter <m.tretter@...gutronix.de>
> ---
>  drivers/gpu/drm/bridge/samsung-dsim.c | 10 ++++++----
>  1 file changed, 6 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c
> index 459be953be55..eb7aca2b9ab7 100644
> --- a/drivers/gpu/drm/bridge/samsung-dsim.c
> +++ b/drivers/gpu/drm/bridge/samsung-dsim.c
> @@ -973,10 +973,12 @@ static void samsung_dsim_set_display_mode(struct samsung_dsim *dsi)
>  	u32 reg;
>  
>  	if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO) {
> -		int byte_clk_khz = dsi->hs_clock / 1000 / 8;
> -		int hfp = DIV_ROUND_UP((m->hsync_start - m->hdisplay) * byte_clk_khz, m->clock);
> -		int hbp = DIV_ROUND_UP((m->htotal - m->hsync_end) * byte_clk_khz, m->clock);
> -		int hsa = DIV_ROUND_UP((m->hsync_end - m->hsync_start) * byte_clk_khz, m->clock);
> +		u64 byte_clk = dsi->hs_clock / 8;
> +		u64 pix_clk = m->clock * 1000;
> +
> +		int hfp = DIV64_U64_ROUND_UP((m->hsync_start - m->hdisplay) * byte_clk, pix_clk);
> +		int hbp = DIV64_U64_ROUND_UP((m->htotal - m->hsync_end) * byte_clk, pix_clk);
> +		int hsa = DIV64_U64_ROUND_UP((m->hsync_end - m->hsync_start) * byte_clk, pix_clk);

Wouldn't it make sense to use the videomode structure here?

>  
>  		/* remove packet overhead when possible */
>  		hfp = max(hfp - 6, 0);
> 

Best regards,
Maxim